Efficient architectures for 1-D and 2-D lifting-based wavelet transforms

H Liao, MK Mandal, BF Cockburn - IEEE Transactions on Signal …, 2004 - ieeexplore.ieee.org
The lifting scheme reduces the computational complexity of the discrete wavelet transform
(DWT) by factoring the wavelet filters into cascades of simple lifting steps that process the …

A survey on lifting-based discrete wavelet transform architectures

T Acharya, C Chakrabarti - Journal of VLSI signal processing systems for …, 2006 - Springer
In this paper, we review recent developments in VLSI architectures and algorithms for
efficient implementation of lifting based Discrete Wavelet Transform (DWT). The basic …

VLSI implementation for one-dimensional multilevel lifting-based wavelet transform

PY Chen - IEEE Transactions on Computers, 2004 - ieeexplore.ieee.org
The lifting scheme has been developed as a flexible tool suitable for constructing
biorthogonal wavelets recently. We present an efficient VLSI architecture for the …

ECG denoising on bivariate shrinkage function exploiting interscale dependency of wavelet coefficients

S Kayhan, E Ercelebi - Turkish Journal of Electrical …, 2011 - journals.tubitak.gov.tr
This paper presents a new method for electrocardiogram (ECG) denoising based on
bivariate shrinkage functions exploiting the interscale dependency of wavelet coefficients …

A block-based architecture for lifting scheme discrete wavelet transform

CH Yang, JC Wang, JF Wang… - IEICE transactions on …, 2007 - search.ieice.org
Two-dimensional discrete wavelet transform (DWT) for processing image is conventionally
designed by line-based architectures, which are simple and have low complexity. However …

A detailed survey on VLSI architectures for lifting based DWT for efficient hardware implementation

UN Bhanu, A Chilambuchelvan - International Journal of VLSI …, 2012 - search.proquest.com
Evaluating the previous work is an important part of developing new hardware efficient
methods for the implementation of DWT through Lifting schemes. The aim of this paper is to …

Digital Image Decoder for Efficient Hardware Implementation

G Savić, M Prokin, V Rajović, D Prokin - Sensors, 2022 - mdpi.com
Increasing the resolution of digital images and the frame rate of video sequences leads to an
increase in the amount of required logical and memory resources necessary for digital …

Modified distributed arithmetic based architecture for discrete wavelet transforms

P Longa, A Miri, M Bolic - Electronics Letters, 2008 - search.proquest.com
A highly area-efficient multiplier-less filterbank architecture for one-and two-dimensional
discrete wavelet transforms (DWT) is presented. The look-up table (LUT) structure in …

Discrete wavelet transform realisation using run-time reconfiguration of field programmable gate array (FPGA) s

C Desmouliers, E Oruklu, J Saniie - IET circuits, devices & systems, 2011 - IET
Designing a universal embedded hardware architecture for discrete wavelet transform is a
challenging problem because of the diversity among wavelet kernel filters. In this work, the …

[PDF][PDF] Design and implementation of lifting based daubechies wavelet transforms using algebraic integers

P Balakrishnan - 2013 - harvest.usask.ca
Over the past few decades, the demand for digital information has increased drastically. This
enormous demand poses serious difficulties on the storage and transmission bandwidth of …