Detection of Catastrophic Faults in 6-Bit R-2R Ladder DAC

FY Mohamed, AS Emara… - 2023 8th International …, 2023 - ieeexplore.ieee.org
This paper studies the problem of finding a high coverage minimum test set for a 6-bit R-2R
ladder Digital-to-Analog Converter (DAC). DAC is a versatile component that is used in …

Mixed mode multiply and accumulate unit with current divider

S Chakraborty, R Joshi - US Patent 10,879,923, 2020 - Google Patents
Methods and systems to implement a multiply and accumu late (MAC) unit is described. In
an example, a device can include a current mode digital-to-analog converter (DAC) …

Matching transmitters with receivers for making network-level assignments

K Maamoun, A Abdo, S Aouini, B Riaz… - US Patent …, 2023 - Google Patents
Abstract Systems and methods for controlling network configurations or assignments are
provided. A method, according to one implementation, includes a step of calculating …

Reducing non-linearities of a phase rotator

JYT Lam, S Aouini, N Ben-Hamida - US Patent 12,034,448, 2024 - Google Patents
RGLRXNKKBLIBQS-XNHQSDQCSA-N leuprolide acetate Chemical compound CC (O)= O.
CCNC (= O)[C@@ H] 1CCCN1C (= O)[C@ H](CCCNC (N)= N) NC (= O)[C@ H](CC (C) C) …

Optical DSP operating at half-baud rate with full data rate converters

S Aouini, RG Gibbins, Y Yazaw, H Mah… - US Patent …, 2023 - Google Patents
Abstract An optical Digital Signal Processor (DSP) circuit includes a digital core configured
to implement digital signal processing functionality and configured to operate at a plurality of …

ADC self-calibration with on-chip circuit and method

A Vigneswaran, D Pollex - US Patent 11,558,061, 2023 - Google Patents
An ADC is a circuit that converts an analog signal to a digital signal. There is a need for
calibration of such circuits such as performed by using known reference vales and …

Reducing non-linearities of a phase rotator

JYT Lam, S Aouini, N Ben-Hamida - US Patent 11,463,093, 2022 - Google Patents
Circuits, controllers, and techniques are provided for reducing non-linearities in a phase
rotator. A circuit, according to one implementation, includes a single Phase-Locked Loop …

Digital-to-analog conversion circuit and receiver including the same

K Ko, BAE Junhan, H Kim, B Park, J Park… - US Patent …, 2023 - Google Patents
A digital-to-analog conversion circuit includes a first digital-to-analog converter (DAC) and a
second DAC. The first DAC includes a first current generation circuit (CGC) and a first …

Mixed mode multiply and accumulate unit

S Chakraborty, R Joshi - US Patent 11,379,186, 2022 - Google Patents
Abstract Systems and methods to implement a multiply and accumulate (MAC) unit is
described. In an example, a device can include a first current mode digital-to-analog …