The growing packing density and power consumption of very large scale integration (VLSI)
circuits have made thermal effects one of the most important concerns of VLSI designers …

Dies (110) with integrated circuits are attached to a wiring substrate (120), possibly an
interposer, and are protected by a protective substrate (410) attached to a wiring substrate …

(51) Int. Cl. 6,746,876 B2 6/2004 Itoh et al. 6,787,916 B2 9/2004 Halahan HOIL
2L/66(2006.01) 6,947,275 B1 9, 2005 Anderson et al. HOIL 2L/78(2006.01) 6,958,285 B2 …

US PATENT DOCUMENTS tribution layer (RDL) of the interposer. The lower surface of the
handle wafer is bonded to the upper surface of the inter poser such that the die is disposed …

US9324626B2 - Interposers with circuit modules encapsulated by moldable material in a cavity,
and methods of fabrication - Google Patents US9324626B2 - Interposers with circuit modules …

Semiconductor integrated circuits (110) or assemblies are disposed at least partially in
cavities between two interposers (120). Conductive vias (204M) pass through at least one of …

Die (110) are attached to an interposer (420), and the interposer/die assembly is placed into
a lid cavity (510). The lid (210) is attached to the top of the assembly, possibly to the …

Dies (110) with integrated circuits are attached to a wiring substrate (120), possibly an
interposer, and are protected by a protective substrate (410) attached to a wiring substrate …

The thermal gradients existing in high-performance circuits may significantly affect their
timing behavior, in particular, by increasing the skew of the clock net and/or altering …

In this paper, we propose a thermal profile based on the finite element method (FEM). The
proposed model is used to predict the temperature profile of the Xilinx™ SPARTAN-3E Field …