Compute in‐memory with non‐volatile elements for neural networks: A review from a co‐design perspective

W Haensch, A Raghunathan, K Roy… - Advanced …, 2023 - Wiley Online Library
Deep learning has become ubiquitous, touching daily lives across the globe. Today,
traditional computer architectures are stressed to their limits in efficiently executing the …

Architecture of computing system based on chiplet

G Shan, Y Zheng, C Xing, D Chen, G Li, Y Yang - Micromachines, 2022 - mdpi.com
Computing systems are widely used in medical diagnosis, climate prediction, autonomous
vehicles, etc. As the key part of electronics, the performance of computing systems is crucial …

A review on SRAM-based computing in-memory: Circuits, functions, and applications

Z Lin, Z Tong, J Zhang, F Wang, T Xu… - Journal of …, 2022 - iopscience.iop.org
Artificial intelligence (AI) processes data-centric applications with minimal effort. However, it
poses new challenges to system design in terms of computational speed and energy …

A bit-serial, compute-in-SRAM design featuring hybrid-integrating ADCs and input dependent binary scaled precharge eliminating DACs for energy-efficient DNN …

R Sehgal, T Thareja, S Xie, C Ni… - IEEE Journal of Solid …, 2023 - ieeexplore.ieee.org
The major challenge faced by modern compute-in-memory (CIM) designs is that they rely
heavily on mixed-signal data converters such as digital-to-analog converters (DACs) and …

From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuits

Z Zhang, J Chen, X Chen, A Guo, B Wang… - Science China …, 2023 - Springer
The rapid growth of CMOS logic circuits has surpassed the advancements in memory
access, leading to significant “memory wall” bottlenecks, particularly in artificial intelligence …

In-memory computation with improved linearity using adaptive sparsity-based compact thermometric code

PK Saragada, BP Das - IEEE Transactions on Very Large Scale …, 2022 - ieeexplore.ieee.org
The article presents an efficient static random access memory (SRAM)-based in-memory
computation (IMC) architecture which is capable of performing image classification with …

Trends in analog and digital intensive compute-in-SRAM designs

R Sehgal, JP Kulkarni - 2021 IEEE 3rd International …, 2021 - ieeexplore.ieee.org
The unprecedented growth in Deep Neural Networks (DNN) model size has resulted into a
massive amount of data movement from off-chip memory to on-chip processing cores in …

In-memory multibit multiplication based on bitline shifting

J Zhang, Z Lin, X Wu, Z Tong, C Peng… - … on Circuits and …, 2021 - ieeexplore.ieee.org
Artificial intelligence algorithms entail an enormous number of multiplication operations. If
these operations are implemented within a static random-access memory array, the …

Computational failure analysis of in-memory rram architecture for pattern classification cnn circuits

NL Prabhu, N Raghavan - IEEE Access, 2021 - ieeexplore.ieee.org
Power-efficient data processing subsystems performing millions of complex concurrent
arithmetic operations per second form part of today's essential solution required to meet the …

HaLo-FL: Hardware-Aware Low-Precision Federated Learning

Y Venkatesha, A Bhattacharjee… - … Design, Automation & …, 2024 - ieeexplore.ieee.org
Applications of federated learning involve devices with extremely limited computational
resources and often with considerable heterogeneity in terms of energy efficiency, latency …