A survey of timing verification techniques for multi-core real-time systems
This survey provides an overview of the scientific literature on timing verification techniques
for multi-core real-time systems. It reviews the key results in the field from its origins around …
for multi-core real-time systems. It reviews the key results in the field from its origins around …
Data allocation for hybrid memory with genetic algorithm
The gradually widening speed disparity between CPU and memory has become an
overwhelming bottleneck for the development of chip multiprocessor systems. In addition …
overwhelming bottleneck for the development of chip multiprocessor systems. In addition …
A real-time scratchpad-centric os for multi-core embedded systems
Multi-core processors have replaced single-core systems in almost every segment of the
industry. Unfortunately, their increased complexity often causes a loss of temporal …
industry. Unfortunately, their increased complexity often causes a loss of temporal …
Memory efficient global scheduling of real-time tasks
A Alhammad, S Wasly… - 21st IEEE Real-Time and …, 2015 - ieeexplore.ieee.org
Current computing architectures are commonly built with multiple cores and a single shared
main memory. Even though this architecture increases the overall computation power, main …
main memory. Even though this architecture increases the overall computation power, main …
A real-time scratchpad-centric os with predictable inter/intra-core communication for multi-core embedded systems
Multi-core processors have replaced single-core systems in almost every segment of the
industry. Unfortunately, their increased complexity often causes a loss of temporal …
industry. Unfortunately, their increased complexity often causes a loss of temporal …
Memory-processor co-scheduling of AECR-DAG real-time tasks on partitioned multicore platforms with scratchpads
Multicore systems with core-level scratchpad memories offer appealing architectures for
constructing efficient and predictable real-time systems. In this work, we aim to improve the …
constructing efficient and predictable real-time systems. In this work, we aim to improve the …
Software controlled memories for scalable many-core architectures
LAD Bathen, ND Dutt - … and Real-Time Computing Systems and …, 2012 - ieeexplore.ieee.org
Technology scaling along with the ever evolving demand for media-rich software stacks
have motivated the need for many-core platforms. With the increase in compute power and …
have motivated the need for many-core platforms. With the increase in compute power and …
Memory feasibility analysis of parallel tasks running on scratchpad-based architectures
This work proposes solutions for bounding the worst-case memory space requirement for
parallel tasks running on multicore platforms with scratchpad memories. It introduces a …
parallel tasks running on multicore platforms with scratchpad memories. It introduces a …
[图书][B] Precision timed machines
IS Liu - 2012 - search.proquest.com
Abstract Cyber-Physical Systems (CPS) are integrations of computation with physical
processes. These systems must be equipped to handle the inherent concurrency and …
processes. These systems must be equipped to handle the inherent concurrency and …
HaVOC a hybrid memory-aware virtualization layer for on-chip distributed ScratchPad and non-volatile memories
Hybrid on-chip memories that combine Non-Volatile Memories (NVMs) with SRAMs promise
to mitigate the increasing leakage power of traditional on-chip SRAMs. We present HaVOC …
to mitigate the increasing leakage power of traditional on-chip SRAMs. We present HaVOC …