[图书][B] VLSI test principles and architectures: design for testability

LT Wang, CW Wu, X Wen - 2006 - books.google.com
This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …

POIROT: A logic fault diagnosis tool and its applications

S Venkataraman… - … Test Conference 2000 …, 2000 - ieeexplore.ieee.org
Logic fault diagnosis or fault isolation is the process of analyzing the failing logic portions of
an integrated circuit to isolate the cause of failure. Fault diagnosis plays an important role in …

Poirot: Applications of a logic fault diagnosis tool

S Venkataraman… - IEEE Design & Test of …, 2001 - ieeexplore.ieee.org
Poirot: applications of a logic fault diagnosis tool Page 1 19 0740-7475/01/$10.00 © 2001 IEEE
January–February 2001 AUTOMATED FAULT DIAGNOSIS is essential to the failure analysis …

Improving precision using mixed-level fault diagnosis

ME Amyeen, D Nayak… - 2006 IEEE International …, 2006 - ieeexplore.ieee.org
For nanometer manufacturing fabrication process, it is critical to narrow down the defect
location for successful physical failure analysis. This paper presents a mixed-level diagnosis …

A gate-level method for transistor-level bridging fault diagnosis

X Fan, W Moore, C Hora… - 24th IEEE VLSI Test …, 2006 - ieeexplore.ieee.org
The paper addresses the issue of transistor-level bridging fault diagnosis. While most of the
previous bridging fault diagnosis work focuses on the gate-level bridging faults, this method …

Bridge fault diagnosis using stuck-at fault simulation

J Wu, EM Rudnick - … Transactions on Computer-Aided Design of …, 2000 - ieeexplore.ieee.org
A new diagnostic fault simulator is described that diagnoses both feedback and
nonfeedback bridge faults in combinational circuits while using information from fault …

Making cause-effect cost effective: low-resolution fault dictionaries

DB Lavo, T Larrabee - Proceedings International Test …, 2001 - ieeexplore.ieee.org
The foremost problem in VLSI fault diagnosis is the problem of data: there's simply too much
of it. Circuits are large and contain enormous numbers of faults of many types. Full-response …

Bridge defect diagnosis with physical information

W Zou, WT Cheng, SM Reddy - 14th Asian Test Symposium …, 2005 - ieeexplore.ieee.org
Circuit behavior in the presence of bridge defects is affected by three factors: bridge
resistance, drive strength of bridged signals and the threshold voltages of downstream …

On applying non-classical defect models to automated diagnosis

J Saxena, KM Butler, H Balachandran… - … 1998 (IEEE Cat. No …, 1998 - ieeexplore.ieee.org
Automated fault diagnosis based on the stuck-at fault model is not always effective. This
paper presents practical experiences in applying a bridging fault based diagnosis technique …

[PDF][PDF] Progressive bridge identification

TJ Vogels, W Maly, S Blanton - ITC, 2003 - researchgate.net
We present an efficient algorithm for identification of two-line bridges in combinational
CMOS logic that narrows down the two-line bridge candidates based on tester responses for …