Sub-sampling PLL techniques
X Gao, E Klumperink, B Nauta - 2015 IEEE Custom Integrated …, 2015 - ieeexplore.ieee.org
In a classical PLL, the phase detector (PD) and charge pump (CP) noise is multiplied by N 2,
when referred to the VCO output, due to the divide-by-N in the feedback path. It often …
when referred to the VCO output, due to the divide-by-N in the feedback path. It often …
A 28-GHz quadrature fractional-N frequency synthesizer for 5G transceivers with less than 100-fs jitter based on cascaded PLL architecture
W El-Halwagy, A Nag, P Hisayasu… - IEEE Transactions …, 2017 - ieeexplore.ieee.org
This paper introduces a quadrature fractional-N cascaded frequency synthesizer and its
phase noise analysis, optimization, and design for future 5G wireless transceivers. The …
phase noise analysis, optimization, and design for future 5G wireless transceivers. The …
A 24/77 GHz dual-band receiver for automotive radar applications
X Yi, G Feng, Z Liang, C Wang, B Liu, C Li… - IEEE …, 2019 - ieeexplore.ieee.org
A fully-integrated 24/77 GHz dual-band receiver is presented for automotive radar
applications. The proposed receiver consists of a dual-band LNA, a dual-band sub-sampling …
applications. The proposed receiver consists of a dual-band LNA, a dual-band sub-sampling …
A low-jitter ring-oscillator phase-locked loop using feedforward noise cancellation with a sub-sampling phase detector
SS Nagam, PR Kinget - IEEE Journal of Solid-State Circuits, 2018 - ieeexplore.ieee.org
Ring-oscillator (RO)-based phase-locked loops (PLLs) are very attractive for system-on-chip
applications for their compactness and tuning range, but suffer from high jitter and supply …
applications for their compactness and tuning range, but suffer from high jitter and supply …
A 42 mW 200 fs-jitter 60 GHz sub-sampling PLL in 40 nm CMOS
V Szortyka, Q Shi, K Raczkowski… - IEEE Journal of Solid …, 2015 - ieeexplore.ieee.org
A 60 GHz sub-sampling PLL implemented in 40 nm CMOS is presented in this paper. The
sub-sampling phase detector (SSPD) runs at 30 GHz after an inductively-peaked static …
sub-sampling phase detector (SSPD) runs at 30 GHz after an inductively-peaked static …
A 93.4–104.8-GHz 57-mW Fractional- Cascaded PLL With True In-Phase Injection-Coupled QVCO in 65-nm CMOS Technology
X Yi, Z Liang, G Feng, F Meng, C Wang… - IEEE Transactions …, 2019 - ieeexplore.ieee.org
A fully integrated 93.4-104.8-GHz 57-mW fractional-N cascaded phase-locked loop (PLL)
with true in-phase injection-coupled quadrature voltage-controlled oscillator (QVCO) is …
with true in-phase injection-coupled quadrature voltage-controlled oscillator (QVCO) is …
A 5-GHz low-power low-noise integer-N digital subsampling PLL with SAR ADC PD
M Liu, R Ma, S Liu, Z Ding, P Zhang… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
In this paper, we present a low-power low-noise integer-N divider-less digital phase-locked
loop (PLL) with high resolution. Phase detection is performed by a proposed analog-to …
loop (PLL) with high resolution. Phase detection is performed by a proposed analog-to …
An 8.55–17.11-GHz DDS FMCW Chirp Synthesizer PLL Based on Double-Edge Zero-Crossing Sampling PD With 51.7-fsrms Jitter and Fast Frequency Hopping
J Xiao, N Liang, B Chen, M Liu - IEEE Transactions on Very …, 2022 - ieeexplore.ieee.org
This article proposes a phase-locked loop (PLL) based on the direct digital synthesis
(DDS)/digital-to-analog converter (DAC) and the double-edge zero-crossing sampling …
(DDS)/digital-to-analog converter (DAC) and the double-edge zero-crossing sampling …
A 93.4-to-104.8 GHz 57 mW fractional-N cascaded sub-sampling PLL with true in-phase injection-coupled QVCO in 65 nm CMOS
X Yi, Z Liang, G Feng, CC Boon… - 2016 IEEE Radio …, 2016 - ieeexplore.ieee.org
A fully integrated 93.4-to-104.8 GHz 57 mW cascaded PLL, with true in-phase injection-
coupled QVCO, occupies 0.88 mm 2 in 65 nm CMOS. By cascading the fractional-N PLL and …
coupled QVCO, occupies 0.88 mm 2 in 65 nm CMOS. By cascading the fractional-N PLL and …
A 1.5 V 28 GHz beam steering SiGe PLL for an 81-86 GHz E-band transmitter
T Tired, J Wernehag, W Ahmad, I ud Din… - IEEE Microwave and …, 2016 - ieeexplore.ieee.org
This letter presents measurement results for a low supply voltage 28 GHz beam steering
PLL, designed in a SiGe bipolar process with f T= 200 GHz. The PLL, designed around a …
PLL, designed in a SiGe bipolar process with f T= 200 GHz. The PLL, designed around a …