Neuro-inspired computing with emerging nonvolatile memorys

S Yu - Proceedings of the IEEE, 2018 - ieeexplore.ieee.org
This comprehensive review summarizes state of the art, challenges, and prospects of the
neuro-inspired computing with emerging nonvolatile memory devices. First, we discuss the …

Neuromemristive circuits for edge computing: A review

O Krestinskaya, AP James… - IEEE transactions on …, 2019 - ieeexplore.ieee.org
The volume, veracity, variability, and velocity of data produced from the ever increasing
network of sensors connected to Internet pose challenges for power management …

XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks

X Sun, S Yin, X Peng, R Liu, J Seo… - 2018 Design, Automation …, 2018 - ieeexplore.ieee.org
Recent advances in deep learning have shown that Binary Neural Networks (BNNs) are
capable of providing a satisfying accuracy on various image datasets with significant …

A survey of ReRAM-based architectures for processing-in-memory and neural networks

S Mittal - Machine learning and knowledge extraction, 2018 - mdpi.com
As data movement operations and power-budget become key bottlenecks in the design of
computing systems, the interest in unconventional approaches such as processing-in …

Spikesim: An end-to-end compute-in-memory hardware evaluation tool for benchmarking spiking neural networks

A Moitra, A Bhattacharjee, R Kuang… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
Spiking neural networks (SNNs) are an active research domain toward energy-efficient
machine intelligence. Compared to conventional artificial neural networks (ANNs), SNNs …

Long short-term memory network design for analog computing

Z Zhao, A Srivastava, L Peng, Q Chen - ACM Journal on Emerging …, 2019 - dl.acm.org
We present an analog-integrated circuit implementation of long short-term memory network,
which is compatible with digital CMOS technology. We have used multiple-input floating …

MAX2: An ReRAM-Based Neural Network Accelerator That Maximizes Data Reuse and Area Utilization

M Mao, X Peng, R Liu, J Li, S Yu… - IEEE Journal on …, 2019 - ieeexplore.ieee.org
Although recent advances in resistive random access memory (ReRAM)-based accelerator
designs for deep convolutional neural networks (CNNs) offer energy-efficiency …

ReNEW: Enhancing lifetime for ReRAM crossbar based neural network accelerators

W Wen, Y Zhang, J Yang - 2019 IEEE 37th International …, 2019 - ieeexplore.ieee.org
With analog current accumulation feature, resistive memory (ReRAM) crossbars are widely
studied to accelerate neural network applications. The ReRAM crossbar based accelerators …

In-memory batch-normalization for resistive memory based binary neural network hardware

H Kim, Y Kim, JJ Kim - Proceedings of the 24th Asia and South Pacific …, 2019 - dl.acm.org
Binary Neural Network (BNN) has a great potential to be implemented on Resistive memory
Crossbar Array (RCA)-based hardware accelerators because it requires only 1-bit precision …

BNN an ideal architecture for acceleration with resistive in memory computation

A Ding, Y Qiao, N Bagherzadeh - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Binary Neural Networks (BNN) have binarized (-1 and 1) weights and feature maps.
Achieving smaller model sizes and computational simplicity, they are well suited for edge-AI …