A low power radix-4 booth multiplier with pre-encoded mechanism

YJ Chang, YC Cheng, SC Liao, CH Hsiao - Ieee Access, 2020 - ieeexplore.ieee.org
The radix-4 Booth algorithm is widely used to improve the performance of multiplier because
it can reduce the number of partial products by half. However, numerous additional …

Low power 3-input AND/XOR gate design

H Liang, Y Xia, L Qian, C Huang - Journal of Computer-Aided Design & …, 2015 - jcad.cn
input AND/XOR gate is the basic complex gate for Reed-Muller (RM) logic circuit
implementation. To cope with the issues of the present AND and XOR cascaded AND/XOR …

High-speed energy-efficient 5: 2 compressor

A Najafi, S Timarchi, A Najafi - 2014 37th international …, 2014 - ieeexplore.ieee.org
Multipliers are important components that dictate the overall arithmetic circuits' performance.
The most critical components of multipliers are compressors. In this paper, a new 5: 2 …

PVT variability analysis of FinFET and CMOS XOR circuits at 16nm

FGRG da Silva, PF Butzen… - 2016 IEEE International …, 2016 - ieeexplore.ieee.org
This work compares many different transistors arrangements of XOR logic gates under PVT
variability effect in 16nm device technologies: CMOS Bulk and FinFET. The objective is to …

Soft Error Impact on FinFET and CMOS XOR Logic Gates

RNM Oliveira, C Meinhardt - Journal of Integrated Circuits and Systems, 2020 - jics.org.br
With the advance of computer systems, XORgates design became essential on arithmetic
circuits. Atnanometer nodes, despite the electrical characterization, de-signers must to …

Exploring XOR-based Full Adders and decoupling cells to variability mitigation at FinFET technology

FGRG da Silva, RNM Oliveira, AL Zimpeck… - Integration, 2022 - Elsevier
This work analyzes a set of Full Adder circuits considering variability effects, comparing
delay and energy consumption when operating at nominal voltage and near-threshold …

Impact of near-threshold and variability on 7nm FinFET XOR circuits

FGRG da Silva, C Meinhardt… - 2018 25th IEEE …, 2018 - ieeexplore.ieee.org
This paper evaluates ten different XOR logic gates arrangements behavior at near-threshold
operation under process, voltage, and temperature (PVT) variability effects. The experiments …

Power-and variability-aware design of FinFET-based XOR circuit at nanoscale regime

P Srivastava, AK Dwivedi… - 2014 IEEE International …, 2014 - ieeexplore.ieee.org
Escalation in performance parameters due to CMOS technology scaling has proven its worth
in the field of design and implementation. Integration density, low power dissipation and …

Radiation effects in XOR logic gates at 16nm CMOS and FinFET technology

RNM Oliveira, AD Lüdke… - 2019 26th IEEE …, 2019 - ieeexplore.ieee.org
Circuits are becoming more susceptible to radiation effects due to technology scaling. This
work presents a comparative analysis of radiation sensitivity for different topologies of XOR …

Low-power and high-performance 5: 2 compressors

A Najafi, A Najafi, S Mirzakuchaki - 2014 22nd Iranian …, 2014 - ieeexplore.ieee.org
Compressors play a significant role in overall performance of multipliers and hence in
efficiency of arithmetic circuits. To further improvement of multipliers higher order …