Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G
This paper presents a novel 64-parallel 4096-point radix-2 memory-based fast Fourier
transform (FFT) architecture for 6G. This approach is the first one to use 64 parallel branches …
transform (FFT) architecture for 6G. This approach is the first one to use 64 parallel branches …
Radix-2k MSC FFT Architectures
GT Deng, M Garrido, SG Chen, SJ Huang - IEEE Access, 2023 - ieeexplore.ieee.org
In recent years, the SC FFT architecture has become popular for processing serial data. It
requires a small number of components and achieves full utilization of the butterflies, which …
requires a small number of components and achieves full utilization of the butterflies, which …
Memristor-Based Large-Scale High-Radix FFT Circuit Design in NR System
H Jin, L Wang, H Li, K Wang, Z Lu… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Large-scale FFT operations in NR system are highly resource-intensive and computationally
complicated, constituting a significant aspect of signal processing. Using high-radix to …
complicated, constituting a significant aspect of signal processing. Using high-radix to …
A 5.2-GS/s 8-Parallel 1024-Point MDC FFT
This paper presents an efficient 8-parallel 1024-point multi-path delay commutator (MDC)
fast Fourier transform (FFT) implementation on a field-programmable gate array (FPGA). The …
fast Fourier transform (FFT) implementation on a field-programmable gate array (FPGA). The …
Area efficient low power VLSI of 2048-Point pipelined radix 16 MDC/FFT Processer for brain tumour detection using optimized deep dilated convolutional neural …
RC Tanguturi, P Dubey, D Haripriya - Measurement, 2025 - Elsevier
This research presents a novel, area-efficient, low-power VLSI design for a 2048-point
pipelined Radix-16 Mixed-Difference Component (MDC) FFT processor, specifically aimed …
pipelined Radix-16 Mixed-Difference Component (MDC) FFT processor, specifically aimed …
An Automatic Generator of Non-Power-of-Two SDF FFT Architectures for 5G and Beyond
VM Bautista, M Garrido - 2023 38th Conference on Design of …, 2023 - ieeexplore.ieee.org
This paper presents an automatic generator for non-power-of-two (NP2) single-path delay
feedback (SDF) fast Fourier transform (FFT) architectures. Previous generators support sizes …
feedback (SDF) fast Fourier transform (FFT) architectures. Previous generators support sizes …
Optimized 4-Parallel 1024-Point MSC FFT
This paper presents a 4-parallel 1024-point multi-path delay commutator (MSC) fast Fourier
transform (FFT) architecture. The aim of this work is to provide multiple optimizations of this …
transform (FFT) architecture. The aim of this work is to provide multiple optimizations of this …
Enhanced Performance of New Scaling-free CORDIC for Memory-based Fast Fourier Transform Architecture
C Paramasivam, SS Chauhan, VP Meena… - IEEE …, 2025 - ieeexplore.ieee.org
Coordinate rotational digital computer (CORDIC) algorithm is an iterative method and it
performs the vector rotation operation by micro-rotation with scaling operation in each …
performs the vector rotation operation by micro-rotation with scaling operation in each …
Fully Parallel and Reconfigurable Realization of DFT/IDFT using In-Memory Computing
M Mahdavi - 2023 10th International Conference on Wireless …, 2023 - ieeexplore.ieee.org
This paper presents a fully parallel and customizable approach for implementing the
Discrete Fourier transform (DFT) and inverse DFT (IDFT), which are essential in a wide …
Discrete Fourier transform (DFT) and inverse DFT (IDFT), which are essential in a wide …
Novel Access Patterns Based on Overlapping Loading and Processing Times to Reduce Latency and Increase Throughput in Memory-based FFTs
This paper presents novel access patterns for P-parallel N-point radix-2 memory-based fast
Fourier transform (FFT) architectures. This work aims to reduce the latency and increase the …
Fourier transform (FFT) architectures. This work aims to reduce the latency and increase the …