VPR: A new packing, placement and routing tool for FPGA research
We describe the capabilities of and algorithms used in a new FPGA CAD tool, Versatile
Place and Route (VPR). In terms of minimizing routing area, VPR outperforms all published …
Place and Route (VPR). In terms of minimizing routing area, VPR outperforms all published …
Towards integrated performance-driven generative design tools
K Shea, R Aish, M Gourtovaia - Automation in Construction, 2005 - Elsevier
Performance-driven generative design methods are capable of producing concepts and
stimulating solutions based on robust and rigorous models of design conditions and …
stimulating solutions based on robust and rigorous models of design conditions and …
Synthesis of high-performance analog circuits in ASTRX/OBLX
ES Ochotta, RA Rutenbar… - IEEE Transactions on …, 1996 - ieeexplore.ieee.org
We present a new synthesis strategy that can automate fully the path from an analog circuit
topology and performance specifications to a sized circuit schematic. This strategy relies on …
topology and performance specifications to a sized circuit schematic. This strategy relies on …
[图书][B] Architectures and algorithms for field-programmable gate arrays with embedded memory
SJE Wilton - 1997 - Citeseer
Doctor of Philosophy, 1997 Steven JE Wilton Department of Electrical and Computer
Engineering University of Toronto Recent dramatic improvements in integrated circuit …
Engineering University of Toronto Recent dramatic improvements in integrated circuit …
Efficient and effective placement for very large circuits
WJ Sun, C Sechen - … on Computer-Aided Design of Integrated …, 1995 - ieeexplore.ieee.org
We present a new approach to simulated annealing and a new hierarchical algorithm for
row-based placement which has obtained the best results ever reported for a large set of …
row-based placement which has obtained the best results ever reported for a large set of …
[PDF][PDF] Timing driven placement for large standard cell circuits
W Swartz, C Sechen - Proceedings of the 32nd Annual ACM/IEEE …, 1995 - dl.acm.org
We present an algorithm for accurately controlling delays during the placement of large
standard cell integrated circuits. Previous approaches to timing driven placement could not …
standard cell integrated circuits. Previous approaches to timing driven placement could not …
Adjustable tensegrity structures
A tensegrity is a lightweight space structure consisting of compression members surrounded
by a network of tension members. They can be easily dismantled and therefore provide …
by a network of tension members. They can be easily dismantled and therefore provide …
[HTML][HTML] A simulated annealing-based algorithm using hierarchical models for general three-dimensional component layout
J Cagan, D Degentesh, S Yin - Computer-aided design, 1998 - Elsevier
An efficient simulated annealing-based algorithm which optimizes component layout is
presented. The efficiency comes in the algorithm's ability to calculate component overlap …
presented. The efficiency comes in the algorithm's ability to calculate component overlap …
A shape annealing approach to optimal truss design with dynamic grouping of members
A shape annealing approach to truss topology design is presented that considers the
tradeoff between the mass of the structure and the grouping of members, where all members …
tradeoff between the mass of the structure and the grouping of members, where all members …
Innovative dome design: Applying geodesic patterns with shape annealing
Shape annealing, a computational design method applied to structural design, has been
extended to the design of traditional and innovative three-dimensional domes that …
extended to the design of traditional and innovative three-dimensional domes that …