Reconfigurability can be thought of as software-defined functionality, where flexibility is
controlled predominately through the specification of bit patterns. Reconfigurable systems …

Dynamic partial reconfiguration (DPR) allows us to adapt hardware resources to meet time‐
varying requirements in power, resources, or performance. In this paper, we present two …

The use of Field Programmable Gate Array (FPGA) based System on Chip (SoC) is a
promising approach in Multimedia applications. In SoC, computationally intensive tasks are …

It will be more difficult to continue with Moore's law scaling in the next years without
exploring new heterogeneous architectures with application-customised hardware. The …

There is strong interest in the development of dynamically reconfigurable systems that can
meet real-time constraints in energy/power-performance-accuracy (EPA/PPA). In this …

Partial dynamic reconfiguration of FPGAs gives designers the capability to change certain
parts of the hardware while other parts remain active and in use. This provides several …

Several embedded application domains for reconfigurable systems tend to combine
frequent changes with high performance demands of their workloads such as image …

We present a framework for the implementation of self-reconfigurable 2D Discrete Cosine
Transforms (DCTs). Dynamic Partial Reconfiguration (DPR) and Dynamic Frequency …

Our current technological era is flooded with smart devices that provide significant
computational resources that require optimal video communications solutions. Optimal and …

Dynamic Partial Reconfiguration (DPR) is an efficient technique in terms of power, resources
and performance in order to achieve varying user requirements. In this paper we have …