High-frequency scalable electrical model and analysis of a through silicon via (TSV)

J Kim, JS Pak, J Cho, E Song, J Cho… - IEEE Transactions …, 2011 - ieeexplore.ieee.org
We propose a high-frequency scalable electrical model of a through silicon via (TSV). The
proposed model includes not only the TSV, but also the bump and the redistribution layer …

Rigorous electrical modeling of through silicon vias (TSVs) with MOS capacitance effects

T Bandyopadhyay, KJ Han, D Chung… - IEEE Transactions …, 2011 - ieeexplore.ieee.org
3-D integration of microelectronic systems reduces the interconnect length, wiring delay, and
system size, while enhancing functionality by heterogeneous integration. Through silicon via …

High-frequency scalable modeling and analysis of a differential signal through-silicon via

J Kim, J Cho, J Kim, JM Yook, JC Kim… - IEEE Transactions …, 2014 - ieeexplore.ieee.org
An analytic scalable model of a differential signal through-silicon via (TSV) is proposed. This
TSV is a ground-signal-signal-ground (GSSG)-type differential signal TSV. Each proposed …

Through-strata-via (TSV) parasitics and wideband modeling for three-dimensional integration/packaging

Z Xu, JQ Lu - IEEE Electron Device Letters, 2011 - ieeexplore.ieee.org
This letter reports on techniques of full-wave extractions and analytical calculations to
investigate the through-strata-via (TSV) parasitics in 3-D integration/packaging. Both …

Modeling and application of multi-port TSV networks in 3-D IC

W Yao, S Pan, B Achkir, J Fan… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
Through-silicon-via (TSV) enables vertical connectivity between stacked chips or interposer
and is a key technology for 3-D integrated circuits (ICs). While arrays of TSVs are needed in …

Electrical characterization of RF TSV for 3D multi-core and heterogeneous ICs

L Yu, H Yang, TT Jing, M Xu, R Geer… - 2010 IEEE/ACM …, 2010 - ieeexplore.ieee.org
In this paper, radio frequency (RF) through-silicon via (TSV) designs and models are
proposed to achieve high-frequency vertical connectivity for three dimensional (3D) multi …

Electrical modeling of tapered TSV including MOS-Field effect and substrate parasitics: Analysis and application

A Nabil, JA Bernardo, Y Ma, M Abouelatta… - Microelectronics …, 2020 - Elsevier
In this paper, a simple closed-form model identifying the electrical behavior of a taper
through silicon via (TSV) is reported. The model is based on the Transmission Line Method …

Precise RLGC modeling and analysis of through glass via (TGV) for 2.5 D/3D IC

J Kim, I Hwang, Y Kim, J Cho… - 2015 IEEE 65th …, 2015 - ieeexplore.ieee.org
Through glass via (TGV) is most important technology in the glass interposer. Electrical
characteristic of TGV determines the overall signal integrity of signal paths in 2.5 D/3D …

Equivalent lumped element models for various n-port Through Silicon Vias networks

K Salah, H Ragai, Y Ismail… - 16th Asia and South …, 2011 - ieeexplore.ieee.org
This paper proposes an equivalent lumped element model for various multi-TSV
arrangements and introduces closed form expressions for the capacitive, resistive, and …

Development and characterisation of high electrical performances TSV for 3D applications

D Henry, S Cheramy, J Charbonnier… - 2009 11th …, 2009 - ieeexplore.ieee.org
Today, a new trend in wafer level packaging is to add more than one die in the same
package and, sometimes, to use the third dimension in order to: Decrease the form factor of …