Low power 4-bit arithmetic logic unit using full-swing GDI technique

MA Ahmed, MA Abdelghany - 2018 International Conference …, 2018 - ieeexplore.ieee.org
Power dissipation and area of the circuit are the main issues in the electronics industry, this
paper provides a design of 4-Bit Arithmetic Logic Unit (ALU) using Full-Swing GDI …

[PDF][PDF] Low Power Delay Product 8-bit ALU design using decoder and data selector

N Telagam, N Kandasamy - Majlesi Journal of Electrical Engineering, 2018 - journals.iau.ir
The semiconductor circuits dissipate energy in the form of binary digits. This dissipation of
energy is in the form of power consumption. ALU is complex circuit and is one of many …

A proposed reliable and power efficient 14T full adder circuit design

S Subramaniam, TWX Wilson… - TENCON 2017-2017 …, 2017 - ieeexplore.ieee.org
This paper presents design of a new stable 14T full power efficient adder circuit. The
proposed circuit is designed based on Pass Transistor Logic (PTL) network using NMOS …

High Performance GDI-ALU Using 10T Adder Cells

SB Ramakrishna, AG Prasad, P Anand… - 2018 3rd IEEE …, 2018 - ieeexplore.ieee.org
Gate diffusion input (GDI)—is a latest inventive technique that has been significant in
improving the digital logic performance while incorporated in CMOS VLSI circuit design. This …

[引用][C] Simulation and Modelling of Optimal ALU design architecture

A Kumar, L Singh, MT Scholar