FinFET based SRAMs in Sub-10nm domain
An exponential rise in transistor count, have increased the power consumption of the
modern digital system. Moreover, at lower technology node, the performance of …
modern digital system. Moreover, at lower technology node, the performance of …
Statistical analysis of low-power SRAM cell structure
G Prasad, A Anand - Analog Integrated Circuits and Signal Processing, 2015 - Springer
The reduction of the channel length due to scaling increases the leakage current resulting in
a major contribution to the static power dissipation. In this paper, a novel SRAM cell with …
a major contribution to the static power dissipation. In this paper, a novel SRAM cell with …
Design and Performance Analysis of 6T SRAM on 130 nm Technology
K Sharma, M Mehta, S Tyagi - 2019 International Conference …, 2019 - ieeexplore.ieee.org
CMOS devices are being scaled down for better performance in areas like power
dissipation, speed, size and reliability. It is important to reduce the energy usage while …
dissipation, speed, size and reliability. It is important to reduce the energy usage while …
A comparative analysis of 6T, 7T, 8T and 9T SRAM cells in 90nm technology
C Premalatha, K Sarika… - 2015 IEEE International …, 2015 - ieeexplore.ieee.org
Static Random Access Memory (SRAM) is a memory that is designed to provide high speed
and low power applications. As the technology is shrinking down, the power supply is also …
and low power applications. As the technology is shrinking down, the power supply is also …
Design and stability analysis of CNTFET based SRAM cell
T Newar, T Roy, J Chowdhury… - 2016 IEEE Students' …, 2016 - ieeexplore.ieee.org
Static Random Access Memory (SRAM) is one of the most crucial and critical memory
devices used in today's technological environment. The continuous scaling of CMOS …
devices used in today's technological environment. The continuous scaling of CMOS …
Process variation analysis of 10T SRAM cell for low power, high speed cache memory for IoT applications
SRAM (static random access memory) based cache memories are widely used due to their
high speed. On-chip SRAMs are considered as one central part of the SOCs (system on …
high speed. On-chip SRAMs are considered as one central part of the SOCs (system on …
Low-power and high speed SRAM for ultra low power applications
N Meshram, G Prasad, D Sharma… - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
The rapid development of battery-powered gadgets has made low-power design a priority in
recent years. In addition, integrated SRAM units in contemporary soCs have become an …
recent years. In addition, integrated SRAM units in contemporary soCs have become an …
Statistical (MC) and static noise margin analysis of the SRAM cells
For the first time through this paper, a Static Random Access Memory using 9T SRAM, 8T
SRAM and 6T SRAM has been compared using N-curve and statistical analysis which …
SRAM and 6T SRAM has been compared using N-curve and statistical analysis which …
Reliability and Power Analysis of FinFET Based SRAM
A Navaneetha, K Bikshalu - Silicon, 2022 - Springer
Demand for accommodating more and new functionalities within a single chip such as SOC
needs novel devices and architecture such as FinFET devices instead of MOSFET. FinFET …
needs novel devices and architecture such as FinFET devices instead of MOSFET. FinFET …
Ultra Low power dissipation in 9T SRAM design by using FinFET Technology
N Sharma - 2016 International Conference on ICT in Business …, 2016 - ieeexplore.ieee.org
Rapid growth of semiconductor industries demanded for lower power consumption for
recent IC design in Deep sub micron technology (DSM). As steady miniaturization of …
recent IC design in Deep sub micron technology (DSM). As steady miniaturization of …