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US8418023B2 - Low density parity check decoder for irregular LDPC codes - Google Patents
US8418023B2 - Low density parity check decoder for irregular LDPC codes - Google Patents …

In one embodiment, a forward substitution component performs forward substitution based
on a lower-triangular matrix and an input vector to generate an output vector. The forward …

Embodiments of the present invention are methods for break ing one or more trapping sets
in a near codeword of a failed graph-based decoder, eg, an LDPC decoder. The methods …

See application file for complete search history. In one embodiment, an LDPC
decoderperforms a targeted bit adjustment method to recover a valid codeword after the …

In one embodiment, a turbo equalizer is selectively operable in either first or second modes.
In the first mode, layered (low-density parity-check (LDPC)) decoding is performed on soft …

3.755, 779 A 8, 1973 Price COrrect codeword, then (i) the controller selects the averaging
4,295.218 A 10, 1981 Tanner mode,(ii) the extrinsic LLR value generator is configured to …

6,307.901 B1 10/2001 Yu et al. 2008/0276.156 A1 11/2008 Gunnam et al. 6,550,023 B1
4/2003 Brauch et al. 2008/0301517 A1 12/2008 Zhong 6,678,843 B2 1/2004 Giulietti et al …

2.93. EA 3.39 yayi, t al. fixed, non-cyclic permutator. The cyclic shifters are capable ea.
2005/0283707 A1 12, 2005 Sharon et al. of supporting a number p of different cyclic LDPC …

US PATENT DOCUMENTS FOREIGN PATENT DOCUMENTS 7,181,676 B2 2/2007
Hocevar WO WO2004O79563 A1 9, 2004 7,237,181 B2 6, 2007 Richardson WO WO2007 …