Investigation of the Electrical Coupling Effect for Monolithic 3-Dimensional Nonvolatile Memory Consisting of a Feedback Field-Effect Transistor Using TCAD
JH Oh, YS Yu - Micromachines, 2023 - mdpi.com
In this study, the electrical characteristics and electrical coupling effect for monolithic 3-
dimensional nonvolatile memory consisting of a feedback field-effect transistor (M3D-NVM …
dimensional nonvolatile memory consisting of a feedback field-effect transistor (M3D-NVM …
Optimizing device dimensions for dual material junctionless tree-FET: a path to improved analog/RF performance
D Beebireddy, K Fatima - ECS Journal of Solid State Science …, 2024 - iopscience.iop.org
This comprehensive study delves into the intricate analysis of the electrical and analog/RF
performance of the Dual Material (DM) junctionless (JL) Tree-FET. During the optimization …
performance of the Dual Material (DM) junctionless (JL) Tree-FET. During the optimization …
Logic-in-memory application of silicon nanotube-based FBFET with core-source architecture
The performance of a silicon nanotube-based feedback field-effect transistor (SiNT FBFET)
with a core-source architecture has been explored in this work for the use in logic-in-memory …
with a core-source architecture has been explored in this work for the use in logic-in-memory …
Design and performance optimization of a stackable Si1-xGex nanosheet gate-controlled thyristor (GCT) DRAM
H He, L Xu, Z Li, H Cao, J Liu, Z Sun, Q Xu, Z Wu - Microelectronics Journal, 2025 - Elsevier
In this study, we propose a novel stackable Si 1− x Ge x nanosheet gate-controlled thyristor
(GCT) 1T0C DRAM design, utilizing thyristor-based positive feedback. This design …
(GCT) 1T0C DRAM design, utilizing thyristor-based positive feedback. This design …
Energy-Efficient Recessed-Source/Drain SOI Feedback FET-Based Oscillators and Coupled Networks for Neuromorphic Computing
This research introduces the first-ever implementation of non-linear relaxation oscillators
and coupled networks utilising energy-efficient Recessed-Source/Drain (Re-S/D) Silicon-On …
and coupled networks utilising energy-efficient Recessed-Source/Drain (Re-S/D) Silicon-On …
Investigation of recessed‐source/drain SOI feedback FET‐based integrate and fire neuron circuit with compact model of threshold switching devices
SK Suddarsi, KJ Dhanaraj… - International Journal of …, 2024 - Wiley Online Library
In this article, the investigation of recessed‐source/drain (Re‐S/D) SOI feedback FET
(FBFET)‐based integrate and fire (IF) neuron circuit parameters is presented using a …
(FBFET)‐based integrate and fire (IF) neuron circuit parameters is presented using a …