A design space exploration tool set for future 1k-core high-performance computers

R Giorgi, M Procaccini, F Khalili - Proceedings of the Rapid Simulation …, 2019 - dl.acm.org
Given the constantly growing complexity of multi-core architectures, Design Space
Exploration (DSE) tools play an important role to evaluate different design options. In this …

Analyzing the impact of operating system activity of different linux distributions in a distributed environment

R Giorgi, M Procaccini, F Khalili - 2019 27th Euromicro …, 2019 - ieeexplore.ieee.org
A rise in the number of threads in large-scale applications running on multi-node
architectures makes operating system activity increasingly more relevant. Therefore …

Optimizing performance and energy efficiency in massively parallel systems

R Nozal - 2022 - repositorio.unican.es
Heterogeneous systems are becoming increasingly relevant, due to their performance and
energy efficiency capabilities, being present in all types of computing platforms, from …

Translating timing into an architecture: the synergy of COTSon and HLS (domain expertise—designing a computer architecture via HLS)

R Giorgi, F Khalili, M Procaccini - International Journal of …, 2019 - Wiley Online Library
Translating a system requirement into a low‐level representation (eg, register transfer level
or RTL) is the typical goal of the design of FPGA‐based systems. However, the Design …

Analysis of the implementation efficiency of digital signal processing systems on the technological platform SoC ZYNQ 7000

O Shkil, O Filippenko, D Rakhlis, I Filippenko… - … and Computer Systems, 2024 - nti.khai.edu
The subject of this paper is the analysis of DSP algorithm implementations based on HLS
synthesis and SIMD instructions acceleration on the SoC hardware platform. The goal of this …

A data-flow execution engine for scalable embedded computing

M Procaccini, R Giorgi - Acaces Poster Abstract 2017, 2017 - usiena-air.unisi.it
Nowadays embedded systems are increasingly used in the world of distributed computing to
provide more computational power without having to change the whole system and the …

A Data-Flow Threads Co-processor for MPSoC FPGA Clusters

F KHALILI MAYBODI - 2021 - flore.unifi.it
Farnam Khalili Maybodi's PhD thesis Page 1 PHD PROGRAM IN SMART COMPUTING
DIPARTIMENTO DI INGEGNERIA DELL’INFORMAZIONE (DINFO) A Data-Flow Threads Co-processor …

Precision Power Measurements of FPGA-MPSoCs

R Drehmel, M Hefele - 2021 IEEE 11th Annual Computing and …, 2021 - ieeexplore.ieee.org
Considering a world of ever-increasing energy requirements and finite resources, power
and energy measurements are vitally important. However, in the realm of FPGA-MPSoCs …

A Dynamic Load Balancer for a Cluster of FPGA SoCs

F KHALILI MAYBODI, R Giorgi - … Computer Architecture and …, 2020 - usiena-air.unisi.it
In many-core systems to achieve maximum performance, it is desirable to produce many
tasks more than the cores and efficiently distribute those tasks among available resources …

[PDF][PDF] Translating Timing into an Architecture: the Synergy of COTSon and HLS

R Giorgi, F Khalili, M Procaccini - sirius.diism.unisi.it
Translating a system requirement into a low-level representation (eg, register transfer level
or RTL) is the typical goal of the design of FPGA based systems. However, the Design …