Review of neural network model acceleration techniques based on FPGA platforms

F Liu, H Li, W Hu, Y He - Neurocomputing, 2024 - Elsevier
Neural network models, celebrated for their outstanding scalability and computational
capabilities, have demonstrated remarkable performance across various fields such as …

High-level synthesis hardware design for fpga-based accelerators: Models, methodologies, and frameworks

RS Molina, V Gil-Costa, ML Crespo, G Ramponi - IEEE Access, 2022 - ieeexplore.ieee.org
Hardware accelerators based on field programmable gate array (FPGA) and system on chip
(SoC) devices have gained attention in recent years. One of the main reasons is that these …

RTL to transistor level power modeling and estimation techniques for FPGA and ASIC: A survey

Y Nasser, J Lorandel, JC Prévotet… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Power consumption constitutes a major challenge for electronics circuits. One possible way
to deal with this issue is to consider it very soon in the design process in order to explore …

NeuPow: A CAD methodology for high-level power estimation based on machine learning

Y Nasser, C Sau, JC Prévotet, T Fanni… - ACM Transactions on …, 2020 - dl.acm.org
In this article, we present a new, simple, accurate, and fast power estimation technique that
can be used to explore the power consumption of digital system designs at an early design …

Power modeling on FPGA: A neural model for RT-level power estimation

Y Nasser, JC Prévotet, M Hélard - Proceedings of the 15th ACM …, 2018 - dl.acm.org
Today reducing power consumption is a major concern especially when it concerns small
embedded devices. Power optimization is required all along the design flow but particularly …

Early Power Estimation of FPGA-based Digital Transparent Processors for 5G-satcom

G Battisti, G Marini, V Sulli, C Rinaldi… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
As the cost of pure terrestrial coverage will be likely unbearable with increasing capacity
needs for rural, remote, and even urban areas, satellite communications are envisaged to …

SoC-based FPGA architecture for image analysis and other highly demanding applications

RS Molina - 2023 - arts.units.it
Nowadays, the development of algorithms focuses on performance-efficient and energy-
efficient computations. Technologies such as field programmable gate array (FPGA) and …

Power Modeling for Fast Power Estimation on FPGA

Y Nasser, JC Prevotet, M Hélard - 2018 - hal.science
Nowadays energy consumption is a major criterion in any electronic system, especially
when it comes to systems working at high throughput with restricted energy consumption …

[PDF][PDF] Adaptive Network Intrusion Detection and Mitigation Model using Clustering and bayesian Algorithm in a Dynamic Environment

MS Muthama, W Mwangi, O Calvin - International Journal of Computer … - academia.edu
Today, there is a serious challenge facing Network Security, especially Networking Intrusion
Detection and prevention attacks of Denial of Service. Denial of Service (DoS) has the most …

A Neural Model for RT-Level Power Estimation on FPGAs

Y Nasser, JC Prevotet, M Hélard - 13ème Colloque du GDR SoC/SiP …, 2018 - hal.science
Power optimization is required all along the design flow but particularly in the first steps
where it has the strongest impact. In this work, we propose new power models based on …