Synthesizing data structure transformations from input-output examples

JK Feser, S Chaudhuri, I Dillig - ACM SIGPLAN Notices, 2015 - dl.acm.org
We present a method for example-guided synthesis of functional programs over recursive
data structures. Given a set of input-output examples, our method synthesizes a program in …

Horn clause solvers for program verification

N Bjørner, A Gurfinkel, K McMillan… - Fields of Logic and …, 2015 - Springer
Automatic program verification and symbolic model checking tools interface with theorem
proving technologies that check satisfiability of formulas. A theme pursued in the past years …

Software Verification of Hyperproperties Beyond k-Safety

R Beutner, B Finkbeiner - International Conference on Computer Aided …, 2022 - Springer
Temporal hyperproperties are system properties that relate multiple execution traces. For
(finite-state) hardware, temporal hyperproperties are supported by model checking …

Synthesizing coupling proofs of differential privacy

A Albarghouthi, J Hsu - Proceedings of the ACM on Programming …, 2017 - dl.acm.org
Differential privacy has emerged as a promising probabilistic formulation of privacy,
generating intense interest within academia and industry. We present a push-button …

Maximal specification synthesis

A Albarghouthi, I Dillig, A Gurfinkel - ACM SIGPLAN Notices, 2016 - dl.acm.org
Many problems in program analysis, verification, and synthesis require inferring
specifications of unknown procedures. Motivated by a broad range of applications, we …

Synthesizing transformations on hierarchically structured data

N Yaghmazadeh, C Klinger, I Dillig… - ACM SIGPLAN …, 2016 - dl.acm.org
This paper presents a new approach for synthesizing transformations on tree-structured
data, such as Unix directories and XML documents. We consider a general abstraction for …

Temporal stream logic: Synthesis beyond the bools

B Finkbeiner, F Klein, R Piskac… - … Conference on Computer …, 2019 - Springer
Reactive systems that operate in environments with complex data, such as mobile apps or
embedded controllers with many sensors, are difficult to synthesize. Synthesis tools usually …

Stateless model checking under a reads-value-from equivalence

P Agarwal, K Chatterjee, S Pathak… - … on Computer Aided …, 2021 - Springer
Stateless model checking (SMC) is one of the standard approaches to the verification of
concurrent programs. As scheduling non-determinism creates exponentially large spaces of …

Realizability modulo theories

A Rodríguez, C Sánchez - Journal of Logical and Algebraic Methods in …, 2024 - Elsevier
In this paper we study the problem of realizability of reactive specifications written in LTL T,
which is the extension of LTL where atomic propositions can be literals from a first-order …

[PDF][PDF] Reactive Synthesis Modulo Theories using Abstraction Refinement.

B Maderbacher, R Bloem - FMCAD, 2022 - library.oapen.org
Reactive synthesis builds a system from a specification given as a temporal logic formula.
Traditionally, reactive synthesis is defined for systems with Boolean input and output …