[HTML][HTML] NP-Domino, Ultra-Low-Voltage, High-Speed, Dual-Rail, CMOS NOR Gates

A Dadashi, O Mirmotahari, Y Berg - Circuits and Systems, 2016 - scirp.org
In this paper, novel ultra low voltage (ULV) dual-rail NOR gates are presented which use the
semi-floating-gate (SFG) structure to speed up the logic circuit. Higher speed in the lower …

An ultra-low-voltage, semi-floating-gate, domino, dual-rail, NOR gate

A Dadashi, O Mirmotahari… - 2015 IEEE International …, 2015 - ieeexplore.ieee.org
In this paper, a new ultra low voltage (ULV) dual-rail NOR gate based on the semi-floating-
gate (SFG) structure is presented. Higher speed in the lower supply voltages and robustness …

High-speed dynamic dual-rail ultra low voltage static CMOS logic operating at 300 mV

O Mirmotahari, AD Nanoelectronics… - … on Design and …, 2016 - ieeexplore.ieee.org
In this paper we propose a differential dynamic dual rail CMOS logic style for ultra-low-
voltage and high-speed operation. For a supply voltage equal to 300mV using a 90nm …

Ultra-Low-Voltage and Energy-Efficient Circuit Techniques for iOTs

A Dadashi - 2022 - duo.uio.no
The main aim of this research is to study and develop new Ultra-Low Voltage and energy-
efficient circuit techniques for low power iOT applications. In the digital domain, NP-domino …

Domino dual-rail, high-speed, NOR logic, with 300mV supply in 90 nm CMOS technology

A Dadashi, O Mirmotahari… - 2016 IEEE International …, 2016 - ieeexplore.ieee.org
A new ultra low voltage (ULV) dual-rail NOR gate is presented in this paper, which uses the
semi-floating-gate (SFG) technique to speed up the logic circuit. Higher speed in the lower …

Low-voltage and high-speed CMOS circuit design with low-power mode

Y Berg, O Mirmotahari - 2015 IEEE International Conference on …, 2015 - ieeexplore.ieee.org
In this paper we present a modified ultra-low-voltage and high-speed domino logic style with
sleep mode for low-power and low-energy applications. The performance compared to …

High-Speed, Modified, Bulk stimulated, Ultra-Low-Voltage, Domino Inverter

A Dadashi, Y Berg… - 2015 IEEE Computer …, 2015 - ieeexplore.ieee.org
In this paper, a new Ultra low voltage (ULV) logic circuit based on the floating gate structure
is presented. In this technique we utilized the bulks of the transistors to speed up the circuit …

Ultra Low-Voltage static precharge NAND/NOR gates

O Mirmotahari, Y Berg - 2014 IEEE International …, 2014 - ieeexplore.ieee.org
The Ultra Low-Voltage (ULV) NAND and NOR gates are presented in this paper. These
gates are based on the ULV precharge inverter presented in [11]. We intend to verify the …

Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV

O Mirmotahari, A Dadashi… - … on Electronics, Circuits …, 2015 - ieeexplore.ieee.org
In this paper we propose a differential dynamic dual rail CMOS logic style for ultra-low-
voltage and high-speed operation. For a supply voltage equal to 300mV using a 90nm …

High-Speed Digital Ultra-Low Voltage Floating Gate Design

HS Bechmann - 2014 - duo.uio.no
This thesis covers the design, production and measurement of digital ultra-low voltage
floating gate logic. The increasing demand for low-power electronics, fueled by the …