Demystifying the system vulnerability stack: Transient fault effects across the layers

G Papadimitriou, D Gizopoulos - 2021 ACM/IEEE 48th Annual …, 2021 - ieeexplore.ieee.org
In this paper, we revisit the system vulnerability stack for transient faults. We reveal severe
pitfalls in widely used vulnerability measurement approaches, which separate the hardware …

Demystifying soft error assessment strategies on arm cpus: Microarchitectural fault injection vs. neutron beam experiments

A Chatzidimitriou, P Bodmann… - 2019 49th Annual …, 2019 - ieeexplore.ieee.org
Fault injection in early microarchitecture-level simulation CPU models and beam
experiments on the final physical CPU chip are two established methodologies to access the …

Soft error effects on arm microprocessors: Early estimations versus chip measurements

PR Bodmann, G Papadimitriou… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
Extensive research efforts are being carried out to evaluate and improve the reliability of
computing devices either through beam experiments or simulation-based fault injection …

Impact of voltage scaling on soft errors susceptibility of multicore server cpus

D Agiakatsikas, G Papadimitriou, V Karakostas… - Proceedings of the 56th …, 2023 - dl.acm.org
Microprocessor power consumption and dependability are both crucial challenges that
designers have to cope with due to shrinking feature sizes and increasing transistor counts …

Dynamic triple modular redundancy in interleaved hardware threads: An alternative solution to lockstep multi-cores for fault-tolerant systems

M Barbirotta, F Menichelli, A Cheikh… - IEEE …, 2024 - ieeexplore.ieee.org
Over the years, significant work has been done on high-integrity systems, such as those
found in cars, satellites and aircrafts, to minimize the risk that a logic fault causes a system …

Evaluation of dynamic triple modular redundancy in an interleaved-multi-threading risc-v core

M Barbirotta, A Cheikh, A Mastrandrea… - Journal of Low Power …, 2022 - mdpi.com
Functional safety is a key requirement in several application domains in which
microprocessors are an essential part. A number of redundancy techniques have been …

Braum: Analyzing and protecting autonomous machine software stack

Y Gan, P Whatmough, J Leng, B Yu… - 2022 IEEE 33rd …, 2022 - ieeexplore.ieee.org
Autonomous machines, such as Autonomous Vehicles (AV), are vulnerable to a variety of
different faults such as radiation-induced soft/transient errors, adversarial attacks, and …

Anatomy of on-chip memory hardware fault effects across the layers

G Papadimitriou, D Gizopoulos - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Reliability evaluation of a microprocessor design may reveal vulnerable silicon areas that
require protection against faults, but also hardware structures that are inherently more …

Duckcore: A fault-tolerant processor core architecture based on the risc-v isa

J Li, S Zhang, C Bao - Electronics, 2021 - mdpi.com
With the development of large-scale CMOS-integrated circuit manufacturing technology,
microprocessor chips are more vulnerable to soft errors and radiation interference, resulting …

Estimating the failures and silent errors rates of cpus across isas and microarchitectures

D Gizopoulos, G Papadimitriou… - … IEEE International Test …, 2023 - ieeexplore.ieee.org
Silent data corruptions (SDCs) pose a significant challenge to the reliable operation of
modern microprocessors. As the need for enhanced performance and reliability continues to …