Delta-DNN: Efficiently compressing deep neural networks via exploiting floats similarity

Z Hu, X Zou, W Xia, S Jin, D Tao, Y Liu… - Proceedings of the 49th …, 2020 - dl.acm.org
Deep neural networks (DNNs) have gained considerable attention in various real-world
applications due to the strong performance on representation learning. However, a DNN …

Understanding Adam Requires Better Rotation Dependent Assumptions

L Maes, TH Zhang, A Jolicoeur-Martineau… - arXiv preprint arXiv …, 2024 - arxiv.org
Despite its widespread adoption, Adam's advantage over Stochastic Gradient Descent
(SGD) lacks a comprehensive theoretical explanation. This paper investigates Adam's …

Limitations of neural network training due to numerical instability of backpropagation

C Karner, V Kazeev, PC Petersen - Advances in Computational …, 2024 - Springer
We study the training of deep neural networks by gradient descent where floating-point
arithmetic is used to compute the gradients. In this framework and under realistic …

Seamless compiler integration of variable precision floating-point arithmetic

TT Jost, Y Durand, C Fabre, A Cohen… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
Floating-Point (FP) units in processors are generally limited to supporting a subset of formats
defined by the IEEE 754 standard. As a result, high-efficiency languages and optimizing …

Učenje nevronskih mrež s približnimi množilniki

M Kristan - 2021 - repozitorij.uni-lj.si
V magistrski nalogi realiziramo nevronsko mrežo večslojni perceptron in štiri različne učne
algoritme. Nevronska mreža in učni algoritmi so modularni kar pomeni, da lahko …

Pseudo-rounding in artificial neural networks

G Gouvine - US Patent 11,989,653, 2024 - Google Patents
A system for increasing quality of results of computations of an artificial neural network
(ANN) by using complex rounding rules for parameters in the ANN is provided, the system …

Programiranje adaptivnih algoritmov na vezjih FPGA z ogrodjem OpenCL

Ž Palčič - 2019 - repozitorij.uni-lj.si
V magistrskem delu smo razvili programsko ogrodje za realizacijo in pohitritev delovanja
polno povezanih nevronskih mrez na vezjih FPGA. Nevronske mreze so izvedene v visoko …