A review of recent research on heat transfer in three-dimensional integrated circuits (3-D ICs)
Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …
Electromigration in submicron interconnect features of integrated circuits
H Ceric, S Selberherr - Materials Science and Engineering: R: Reports, 2011 - Elsevier
Electromigration (EM) is a complex multiphysics problem including electrical, thermal, and
mechanical aspects. Since the first work on EM was published in 1907, extensive studies on …
mechanical aspects. Since the first work on EM was published in 1907, extensive studies on …
3-D hyperintegration and packaging technologies for micro-nano systems
JQ Lu - Proceedings of the IEEE, 2009 - ieeexplore.ieee.org
Three-dimensional (3-D) hyperintegration is an emerging technology, which vertically stacks
and interconnects multiple materials, technologies, and functional components to form …
and interconnects multiple materials, technologies, and functional components to form …
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
Three-dimensional integrated circuit (3D IC) with through-silicon-via (TSV) is believed to
offer new levels of efficiency, power, performance, and form-factor advantages over the …
offer new levels of efficiency, power, performance, and form-factor advantages over the …
Through silicon via: From the CMOS imager sensor wafer level package to the 3D integration
X Gagnard, T Mourier - Microelectronic Engineering, 2010 - Elsevier
A wide range of requests coming from customer appears to demonstrate the feasibility of the
TSV for a large range of via size and via AR either for process point of view or for …
TSV for a large range of via size and via AR either for process point of view or for …
Reliability of TSV interconnects: Electromigration, thermal cycling, and impact on above metal level dielectric
T Frank, S Moreau, C Chappaz, P Leduc… - Microelectronics …, 2013 - Elsevier
In this paper, reliability of Through Silicon via (TSV) interconnects is analyzed for two
technologies. First part presents an exhaustive analysis of Cu TSV-last approach of 2μm …
technologies. First part presents an exhaustive analysis of Cu TSV-last approach of 2μm …
Study on Cu protrusion of through-silicon via
The through-silicon via (TSV) approach is essential for 3-D integrated circuit (3-DIC)
packaging technology. TSV fabrication process, however, is still facing several challenges …
packaging technology. TSV fabrication process, however, is still facing several challenges …
Coupled electrical–thermal–mechanical simulation for the reliability analysis of large-scale 3-D interconnects
T Lu, JM Jin - IEEE Transactions on Components, Packaging …, 2017 - ieeexplore.ieee.org
A multiphysics simulation technique based on the finite element method is developed for the
reliability analysis of interconnects. The multiphysics simulation characterizes …
reliability analysis of interconnects. The multiphysics simulation characterizes …
Development of wafer-level warpage and stress modeling methodology and its application in process optimization for TSV wafers
Through-silicon via (TSV) technology has been widely investigated recently for 3-D
electronic packaging integration. Reducing TSV wafer warpage is one of the most …
electronic packaging integration. Reducing TSV wafer warpage is one of the most …
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3-D IC
In this paper, we propose an efficient and accurate full-chip thermomechanical stress and
reliability analysis tool and design optimization methodology to alleviate mechanical …
reliability analysis tool and design optimization methodology to alleviate mechanical …