The rapid development of computing software has facilitated multifarious research in
integrated circuit (IC) packaging. Complicated and complex processes can be visualized via …

A wafer level package (WLP) that has a flip chip form and uses thin-film redistribution with
solder bumps to connect the package to the printed wiring board directly is discussed in this …

Long-fibre-reinforced composite prepregs are introduced to achieve mass production of
complex-shaped composite structures with appropriate mechanical properties. These …

Underfill encapsulation play an important role to improve the reliability of flip chip package,
yet the conventional underfill (CUF) encapsulation process is subjected to several …

In this paper, the finite volume method (FVM) based numerical simulation is used for the flow
visualization of capillary driven underfill process for different solder bump arrangements of …

This paper presents the simulation of pressurized underfill encapsulation process for high
I/O flip chip package. 3D model of flip chip packages is built using GAMBIT and simulated …

Optimized design of the integrated circuit (IC) package gives better IC encapsulation
process and minimizes the stress concentration and deformation of the IC structures. The …

This paper presents a fluid/structure interaction (FSI) analysis of the effects of solder bump
shapes and input/output (I/O) counts on moulded packaging. The FSI events during the …

This paper presents a fluid–structure interaction (FSI) analysis of ball grid array (BGA)
package encapsulation. Real-time and simultaneous FSI analysis is conducted by using …

This paper presents the effect of chip stacking in a 3D integrated circuit package during
plastic encapsulation. An experiment was conducted on four stacked chips with bumps in a …