Massively parallel neural inference computing elements are provided. A plurality of
multipliers is arranged in a plurality of equal-sized groups. Each of the plurality of multipliers …

Some embodiments provide a method for compiling a neural network (NN) program for an
NN inference circuit (NNIC) that includes multiple partial dot product computation cir cuits …

Some embodiments provide an IC for implementing a machine-trained network with multiple
layers. The IC includes a set of circuits to compute a dot product of (i) a first number of input …

US11664819B2 - Homogenizing data sparsity using a butterfly multiplexer - Google Patents
US11664819B2 - Homogenizing data sparsity using a butterfly multiplexer - Google Patents …

2021-09-08 Assigned to SambaNova Systems, Inc. reassignment SambaNova Systems, Inc.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Methods and systems that allow neural network systems to maintain or increase operational
accuracy while being able to operate in various settings. A set of training data is collected …

Some embodiments provide a neural network inference circuit (NNIC) for executing a neural
network that includes multiple computation nodes, that include dot products, at multiple …

One embodiment provides for a compute apparatus comprising a decode unit to decode a
single instruction into a decoded instruction that specifies multiple operands including a …

Some embodiments provide a neural network inference circuit (NNIC) for executing a NN
that includes multiple computation nodes at multiple layers. Each of a set of the computation …

Roughly described, the invention involves a system including a plurality of functional units
that execute different segments of a dataflow, and share intermediate results via a peer-to …