In-memory computation system with drift compensation circuit

M Pasotti, M Carissimi, A Gnudi, EF Scarselli… - US Patent …, 2024 - Google Patents
A circuit includes a memory array with memory cells arranged in a matrix of rows and
columns, where each row includes a word line connected to the memory cells of the row …

Signed and binary weighted computation for an in-memory computation system

M Pasotti, M Carissimi, A Antolini… - US Patent App. 17 …, 2023 - Google Patents
2022-04-12 Assigned to ALMA MATER STUDIORUM-UNIVERSITA'DI BOLOGNA
reassignment ALMA MATER STUDIORUM-UNIVERSITA'DI BOLOGNA ASSIGNMENT OF …

Compensated analog computation for an in-memory computation system

M Pasotti, M Carissimi, A Antolini, EF Scarselli… - US Patent …, 2024 - Google Patents
An in-memory computation (IMC) circuit includes a memory array formed by memory cells
arranged in row-by-column matrix. Computational weights for an IMC operation are stored in …

Method for manufacturing a semiconductor device and semiconductor device

G Parteder, J Kraft, R Coppeta - US Patent 11,355,386, 2022 - Google Patents
A method for manufacturing a semiconductor device is provided. The method comprises the
steps of providing a semiconductor body, forming a trench in the semiconductor body in a …

Discrete three-dimensional processor

G Zhang - US Patent 11,296,068, 2022 - Google Patents
(57) ABSTRACT A discrete three-dimensional (3-D) processor comprises first and second
dice. The first die comprises 3-D memory (3D-M) arrays, whereas the second die comprises …

Discrete three-dimensional processor

G Zhang - US Patent 11,527,523, 2022 - Google Patents
(57) ABSTRACT A discrete 3-D processor comprises first and second dice. The first die
comprises three-dimensional memory (3D-M) arrays, whereas the second die comprises …