Transformation-based verification has been proposed to synergistically leverage various
transformations to successively simplify and decompose large problems to ones which may …

We present several improvements to general-purpose sequential redundancy removal.(1)
We propose using a robust variety of synergistic transformation and verification algorithms to …

Automatic formal verification techniques generally require exponential resources with
respect to the number of primary inputs of a netlist. In this paper, we present several fully …

Pervasive logic is a broad term applied to the variety of logic present in hardware designs,
yet not a part of their primary functionality. Examples of pervasive logic include initialization …

The modeling of design environments using constraints has gained widespread industrial
application, and most verification languages include constructs for specifying constraints. It …

Bounded model checking (BMC) has gained widespread industrial use due to its relative
scalability. Its exhaustiveness over all valid input vectors allows it to expose arbitrarily …

Verification of gate-level implementations of arithmetic circuits is challenging due to a
number of reasons: the existence of some hard-to-verify arithmetic operators (eg …

Circuits can be simplified for combinational equivalence checking by transforming internal
functions, while preserving their ranges. In this paper, we investigate how to effiectively …

This paper describes a new method that is useful in combinational equivalence checking
with very challenging industrial designs. The method does not build a miter; instead it builds …

Ensuring that a design conforms to its specification is an indispensable part of the modern
design automation flow. Model checking is an automated verification technique for checking …