Containing the nanometer “pandora-box”: Cross-layer design techniques for variation aware low power systems

G Karakonstantis, A Chatterjee… - IEEE Journal on …, 2011 - ieeexplore.ieee.org
The demand for richer multimedia services, multifunctional portable devices and high data
rates can only been visioned due to the improvement in semiconductor technology …

Signature driven hierarchical post-manufacture tuning of RF systems for performance and power

A Banerjee, A Chatterjee - IEEE Transactions on Very Large …, 2014 - ieeexplore.ieee.org
Integration of RF circuits in deeply scaled CMOS technologies and severe process variation
in those technology nodes result in poor manufacturing yield. A post-manufacture tuning …

Combination of three classifiers with different architectures for handwritten word recognition

S Gunter, H Bunke - Ninth International Workshop on Frontiers …, 2004 - ieeexplore.ieee.org
The study of multiple classifier systems has become an area of intensive research in pattern
recognition recently. Also in handwriting recognition, systems combining several classifiers …

Adaptive logical control of RF LNA performances for efficient energy consumption

R Khereddine, L Abdallah, E Simeu, S Mir… - VLSI-SoC: Forward …, 2012 - Springer
This work presents a new approach for controlling power consumption in RF devices. The
approach is based on the definition of application-dependent performance modes for power …

Accurate signature driven power conscious tuning of RF systems using hierarchical performance models

A Banerjee, S Sen, S Devarakond… - … IEEE International Test …, 2011 - ieeexplore.ieee.org
In this research, a new post-manufacture tuning approach for yield improvement of
advanced RF systems is developed. The proposed method first determines module level …

Multi-channel testing architecture for high-speed eye-diagram using pin electronics and subsampling monobit reconstruction algorithms

T Moon, HW Choi, DC Keezer… - 2014 IEEE 32nd VLSI …, 2014 - ieeexplore.ieee.org
This paper proposes a new multi-channel testing architecture for high-speed eye-diagram.
The proposed architecture reconstructs the eye-diagram of a multi-Gbps bit pattern with the …

Digitally assisted built-in tuning using Hamming distance proportional signatures in RF circuits

S Devarakond, S Sen, A Banerjee… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
In this paper, a novel built-in tuning technique to compensate for process variability-induced
imperfections in RF circuits is proposed. The yield improvement methodology proposed is a …

Low-cost multi-channel testing of periodic signals using monobit receivers and incoherent subsampling

T Moon, HW Choi, A Chatterjee - 2013 IEEE 31st VLSI Test …, 2013 - ieeexplore.ieee.org
This paper proposes a new method to reconstruct signal by a monobit receiver based on
incoherent subsampling. The proposed method uses a time-variant threshold voltage for the …

Power Aware Post-Manufacture Tuning of MIMO Receiver Systems

D Banerjee, S Sen, SK Devarakond… - … Conference on VLSI …, 2012 - ieeexplore.ieee.org
This paper presents a methodology for post-manufacture tuning of MIMO (Multiple-Input-
Multiple-Output) wireless systems aimed at increasing device manufacturing yield under …

Méthode adaptative de contrôle logique et de test de circuits AMS/RF

R Khereddine - 2011 - theses.hal.science
Les technologies microélectroniques ainsi que les outils de CAO actuels permettent la
conception de plus en plus rapide de circuits et systèmes intégrés très complexes. L'un des …