Tools for reduced precision computation: a survey

S Cherubin, G Agosta - ACM Computing Surveys (CSUR), 2020 - dl.acm.org
The use of reduced precision to improve performance metrics such as computation latency
and power consumption is a common practice in the embedded systems field. This practice …

[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation

S Hauck, A DeHon - 2010 - books.google.com
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …

FRIDGE: a fixed-point design and simulation environment

H Keding, M Willems, M Coors… - … Design, Automation and …, 1998 - ieeexplore.ieee.org
Digital systems, especially those for mobile applications are sensitive to power consumption,
chip size and costs. Therefore they are realized using fixed-point architectures, either …

Combined word-length optimization and high-level synthesis of digital signal processing systems

KI Kum, W Sung - … Transactions on Computer-Aided Design of …, 2001 - ieeexplore.ieee.org
Conventional approaches for fixed-point implementation of digital signal processing
algorithms require the scaling and word-length (WL) optimization at the algorithm level and …

Efficient floating point precision tuning for approximate computing

NM Ho, E Manogaran, WF Wong… - 2017 22nd Asia and …, 2017 - ieeexplore.ieee.org
This paper presents an automatic tool-chain that efficiently computes the precision of floating
point variables down to the bit level of the mantissa. Our toolchain uses a distributed …

[PDF][PDF] A methodology and design environment for DSP ASIC fixed point refinement

R Cmar, L Rijnders, P Schaumont, S Vernalde… - Proceedings of the …, 1999 - dl.acm.org
Complex signal processing algorithms are specified in floating point precision. When their
hardware implementation requires fixed point precision, type refinement is needed. The …

AUTOSCALER for C: An optimizing floating-point to integer C program converter for fixed-point digital signal processors

KI Kum, J Kang, W Sung - … on Circuits and Systems II: Analog …, 2000 - ieeexplore.ieee.org
A translator which converts C-based floating-point digital signal processing programs to
optimized integer C versions is developed for convenient programming and efficient use of …

Pacti: Scaling assume-guarantee reasoning for system analysis and design

I Incer, A Badithela, J Graebener, P Mallozzi… - arXiv preprint arXiv …, 2023 - arxiv.org
Contract-based design is a method to facilitate modular system design. While there has
been substantial progress on the theory of contracts, there has been less progress on …

Rate-0.96 LDPC decoding VLSI for soft-decision error correction of NAND flash memory

J Kim, W Sung - IEEE Transactions on Very Large Scale …, 2013 - ieeexplore.ieee.org
The reliability of data stored in high-density Flash memory devices tends to decrease rapidly
because of the reduced cell size and multilevel cell technology. Soft-decision error …

Analytical fixed-point accuracy evaluation in linear time-invariant systems

D Menard, R Rocher, O Sentieys - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
One of the most important stages of floating-point to fixed-point conversion, is the evaluation
of the fixed-point specification accuracy. This evaluation is required to optimize the data …