H Parandeh-Afshar, A Cevrero… - … Conference on Field …, 2009 - ieeexplore.ieee.org
We propose a new DSP block for use in modern high-performance FPGAs. Current DSP blocks contain fixed-bitwidth multipliers that can be combined efficiently to form larger …
To cope with the increasing complexity of embedded and cyber-physical system design, different system-level design approaches are proposed which start from abstract models and …
Speeding up addition is the key to faster digital signal processing (DSP). This can be achieved by exploiting the properties of redundant number systems. Their expanded symbol …
Hasta hace pocos años, la utilización de aritmética redundante en FPGAs había sido descartada por dos razones principalmente. En primer lugar, por el buen rendimiento que …
RESUMEN DE LA TESIS DOCTORAL DE D. MANUEL AGUSTÍN ORTIZ LÓPEZ El resumen de la tesis para la base de datos Teseo debe ser una presentación de la tesis y tener la …