A novel approach to developing an FPGA-based chirp signal generator using high-level synthesis implementation is proposed. OpenCL, which is a framework used for high-level …
MY Chua, JTS Sumantyo, YQ Ji - 2018 Progress in …, 2018 - ieeexplore.ieee.org
This paper outlines the development work of a new Field Programmable Gate Array (FPGA) based chirp generator from which the new chirp generator is capable of synthesizing 4 pairs …
This paper presents the development work of a PC-based airborne SAR baseband system that integrates commercial off-the-shelf Arbitrary Waveform Generator (AWG) and highspeed …
CM Yam, KV Chet, LH Siong… - Journal of Engineering …, 2020 - journals.mmupress.com
This paper proposes a technique for synthesizing multiple point target scatterer Synthetic Aperture Radar (SAR) echoes in real-time. Traditional approaches require high computation …
In this study, we evaluated the I/Q chirp signal generator using a field-programmable gate array (FPGA) to be implemented for synthetic aperture radar (SAR) application. A chirp …
Airborne Circularly Polarized SAR: Theory, System Design, Hardware Implementation, and Applications Page 1 109 DOI: 10.1201/9781003282693-5 Baseband and Control Unit Ming …
RI Wijaya - AIP Conference Proceedings, 2016 - pubs.aip.org
This paper describes the design and development of an FPGA-based signal generator that simultaneously generates dual frequencies I/Q chirp for high-resolution Pulse Compression …
CM Yama, KOOV Cheta, LIMH Sionga, CY Kita… - opac.ll.chiba-u.jp
This paper presents the design work of Phase Coded (PC) Stepped Frequency Linear Frequency Modulated (SFc‐LFM) technique targeted for use in Ultra‐Wide Band (UWB) …