An architecture-level analysis on deep learning models for low-impact computations
Deep neural networks (DNNs) have made significant achievements in a wide variety of
domains. For the deep learning tasks, multiple excellent hardware platforms provide efficient …
domains. For the deep learning tasks, multiple excellent hardware platforms provide efficient …
Efficient fused MAC unit using multi-operand parallel prefix adder
A Abinaya, M Maheswari - Radioelectronics and Communications Systems, 2022 - Springer
In this brief, various multi-operand parallel prefix adders are designed and they are
implemented in fused multiply-accumulate (MAC) unit. A multi-operand adder is the …
implemented in fused multiply-accumulate (MAC) unit. A multi-operand adder is the …
A novel dual multiplier floating point multiply accumulate architecture
R Kumar, M Pattanaik - … Symposium on VLSI Design and Test, 2015 - ieeexplore.ieee.org
Floating point multiply-accumulate (FPMAC) block is a key unit determining the frequency,
power and area of microprocessors. FPMAC unit is used in engineering and scientific …
power and area of microprocessors. FPMAC unit is used in engineering and scientific …
[HTML][HTML] Эффективный объединенный блок умножения/накопления с использованием мультиоперандного параллельного префиксного сумматора
A Абіная, M Махешвари - Вісті вищих учбових закладів …, 2022 - radio.kpi.ua
Анотація В статье разработаны и реализованы различные мультиоперандные
параллельные префиксные сумматоры в объединенном блоке умножения/накопления …
параллельные префиксные сумматоры в объединенном блоке умножения/накопления …
[图书][B] A novel low power multi path double precision fused multiplier accumulator architecture
M Gopal - 2015 - search.proquest.com
The floating-point fused multiply-add unit has several advantages in a floating-point unit
design. This thesis presents the results of the research, design and implementation of a …
design. This thesis presents the results of the research, design and implementation of a …