To utilize the full potential of modern chip multiprocessors and obtain scalable performance
improvements, it is critical to mitigate resource contention created by multithreaded …

We present a new type of soft‐core processor called the “Data‐Flow Soft‐Core” that can be
implemented through FPGA technology with adequate interconnect resources. This …

The advent of massively parallel many-core architectures on a chip can be considered as a
good opportunity to rethink the classical computation model used for several decades and …

Power consumption and energy efficiency have become a major bottleneck in the design of
new systems for high performance computing. The path to exa-scale computing requires …

Optimization of parallel applications under new many-core architectures is challenging even
for regular applications. Successful strategies inherited from previous generations of parallel …

This paper provides a discussion on the shortcomings of traditional static optimization
techniques when used in the context of many-core architectures. We argue that these …

This paper provides an extended description of the design and implementation of the Time
Iterated Dependency Flow (TIDeFlow) execution model. TIDeFlow is a dataflow-inspired …

New many-core architectures are characterized not only by the large amount of processing
elements but also by the large number and heterogeneity of resources. This new …

In multi-core systems, various factors like inter-process communication, dependency,
resource sharing and scheduling, level of parallelism, synchronization, number of available …

With computing systems marching to exascale and big data era, power consumption has
become more and more important for the system design. Energy efficiency is becoming one …