A 1-gsample/s, 15-GHz input bandwidth master–slave track-and-hold amplifier in inp dhbt technology

A high-linearity, 30 GS/s track-and-hold amplifier and time interleaved sample-and-hold in an InP-on-CMOS process

KN Madsen, TD Gathman, S Daneshgar… - IEEE Journal of Solid …, 2015 - ieeexplore.ieee.org
A high-speed, track-and-hold amplifier and interleaved CMOS sample-and-hold circuit are
implemented in an InP-on-CMOS fabrication process. Conventional 50-Ω interchip …
被引用次数：32 相关文章 所有 4 个版本
[PDF] optica.org

Photonic preprocessor for analog-to-digital-converter using a cavity-less pulse source

AOJ Wiberg, L Liu, Z Tong, E Myslivets, V Ataie… - Optics …, 2012 - opg.optica.org
A photonic preprocessor for analog to digital conversion is demonstrated and characterized
using a cavity-less optical pulse source. The pulse source generates high fidelity pulses at 2 …
被引用次数：45 相关文章 所有 5 个版本

A 20 GS/s 1.2 V 0.13 CMOS Switched Cascode Track-and-Hold Amplifier

H Orser, A Gopinath - … Transactions on Circuits and Systems II …, 2010 - ieeexplore.ieee.org
A low voltage, low power, high sampling rate track-and-hold amplifier (THA) architecture is
proposed. The THA samples at 20 GS/s and combines a distributed amplifier and a switched …
被引用次数：38 相关文章 所有 6 个版本

Design and analysis of CMOS high-speed high dynamic-range track-and-hold amplifiers

YC Liu, HY Chang, SY Huang… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Design and analysis of two high-speed high dynamic-range track-and-hold amplifiers are
presented in this paper using 65-and 90-nm CMOS processes. To achieve remarkable …
被引用次数：21 相关文章 所有 3 个版本

A 55-dB SFDR 16-GS/s track-and-hold amplifier in 0.18 µm SiGe using differential feedthrough cancellation technique

YA Lin, YC Yeh, YC Liu… - 2016 IEEE MTT-S …, 2016 - ieeexplore.ieee.org
A high speed high dynamic range track-and-hold amplifier (THA) using 0.18 μm SiGe
process is presented in this paper. A differential feedthrough cancellation technique is …
被引用次数：15 相关文章 所有 2 个版本
[PDF] musialy.com

A broadband InP track-and-hold amplifier using emitter capacitive/resistive degeneration

S Li, Y Su, H Lv, L Zhou, Y Zhang… - IEEE Microwave and …, 2020 - ieeexplore.ieee.org
In this letter, we present a 24-GSa/s, 20-GHz wideband track-and-hold amplifier (THA)
based on indium phosphide (InP) double-heterojunction bipolar transistor (DHBT) …
被引用次数：11 相关文章 所有 3 个版本

A 27-GHz 45-dB SFDR track-and-hold amplifier using modified darlington amplifier and cascoded SEF in 0.18-μm SiGe process

YA Lin, YC Yeh, HY Chang - 2017 IEEE MTT-S International …, 2017 - ieeexplore.ieee.org
A broadband high-speed high-linearity track-and-hold amplifier (THA) is presented in this
paper using 0.18 μm SiGe process. A switched emitter follower track-and-hold (T/H) stage …
被引用次数：8 相关文章 所有 2 个版本

A 4 GSa/s, 16-GHz input bandwidth master-slave track-and-hold amplifier in InP DHBT technology

J Deza, A Ouslimani, A Konczykowska… - 2012 20th …, 2012 - ieeexplore.ieee.org
A fully differential master-slave track-and-hold amplifier is designed and fabricated with a
320-GHz-f T-InP DHBT process. This circuit shows an input bandwidth of 16 GHz and a-3.5 …
被引用次数：11 相关文章

A 12 GB/s 3-GHz input bandwidth track-and-hold amplifier in 65 nm CMOS with 48-dB spur-free dynamic range

YC Liu, HY Chang, K Chen - 2014 IEEE MTT-S International …, 2014 - ieeexplore.ieee.org
A track-and-hold amplifier using 65 nm CMOS process is presented in this paper. The
cascode topology with inductive peaking technique is employed to enhance voltage …
被引用次数：8 相关文章 所有 3 个版本

A broadband DC-coupling 16 GS/s sample-and-hold amplifier in 0.13 μm SiGe BiCMOS process

H Ding, J Wang, X Cheng, D Wang - AEU-International Journal of …, 2019 - Elsevier
This paper presents a broadband DC-coupling master-slave sample-and-hold amplifier
(SHA) in 0.13 μm SiGe BiCMOS process. PMOS source follower is implemented as the input …
被引用次数：4 相关文章