We tackle the problem of maintaining materialized top-k views. Top-k queries, including MIN
and MAX as important special cases, occur frequently in common database workloads. A top …

Based on a new characterisation of data reuse across multiple loop nests, we preset a
method, a prototyping implementation and some experimental results for analysing the …

Modulo Scheduling is an instruction scheduling technique that is used by many current
compilers. Different approaches have been proposed in the past but there is not a …

Clustering is an approach that many microprocessors are adopting in recent times in order
to mitigate the increasing penalties of wire delays. In this work we propose a novel clustered …

This paper presents a novel scheme to schedule loops for clustered microarchitectures. The
scheme is based on a preliminary cluster assignment phase implemented through graph …

This work presents a modulo scheduling framework for clustered ILP processors that
integrates the cluster assignment, instruction scheduling and register allocation steps in a …

Data caches are a key hardware means to bridge the gap between processor and memory
speeds, but only for programs that exhibit sufficient data locality in their memory accesses …

Clustered VLIW organizations are nowadays a common trend in the design of
embedded/DSP processors. In this work we propose a novel modulo scheduling approach …

Clustered organizations are becoming a common trend in the design of VLIW architectures.
In this work we propose a novel modulo scheduling approach for such architectures. The …

Most memory references in numerical codes correspond to array references whose indices
are affine functions of surrounding loop indices. These array references follow a regular …