M Kaur, N Gupta, S Kumar, B Raj… - IET Circuits, Devices & …, 2021 - Wiley Online Library
A comparative radio‐frequency (RF) and crosstalk analysis is performed on carbon nano‐ interconnects based on an efficient π‐type equivalent single‐conductor model of bundled …
S Chandrakar, D Gupta… - Journal of Circuits, Systems …, 2021 - World Scientific
The metal–semiconductor (MES)-based through silicon vias (TSV) has provided attractive solutions over conventional metal–insulator–semiconductor (MIS) TSVs in recent three …
S Das, DK Das, S Pandit - Analog Integrated Circuits and Signal …, 2023 - Springer
Graphene nanoribbon based interconnect has several advantageous properties over traditional interconnect like power dissipation, delay and integration capability. But each …
CC Sahu, S Anand, MK Majumder - Journal of Computational Electronics, 2021 - Springer
The performance of three-dimensional integrated circuits primarily depends on the filler material used in the through-silicon vias (TSVs). The most widely used filler material is Cu …
In a recent nanoregime, the cross-coupling capacitance plays an important role due to the high packing density of integrated circuits. It can significantly affect the overall interconnect …
CC Sahu, VR Kumbhare… - IETE Journal of Research, 2023 - Taylor & Francis
At high frequency, a magnetic field induced eddy current primarily dominates the performance of a through silicon via (TSV) based 3D interconnects. In this regard, this paper …
The performance of a through silicon via (TSV) based 3D integrated circuit technology is primarily dependent on the choice of an appropriate liner material. The most commonly used …
The approach of monolithic 3D IC (M3D) integration using monolithic inter-tier-vias (MIVs) as interconnect structures is considered. Although, M3D ICs show many benefits of …
GW Wong, N Soin - IETE Journal of Research, 2023 - Taylor & Francis
A new analysis method for the improvement and optimization of the geometrical layout parameters associated with the on-chip n-well meander line resistor layout to have a low …