L Ma, W Qiu, X Fan - Microelectronics Reliability, 2021 - Elsevier
In this review, a review a of the applications of micro-Raman spectroscopy (μRS) to characterize the residual strain and/or stress in electronic packaging is presented. Micro …
When placing a graphene membrane on a substrate, gas molecules may be trapped underneath to form bubbles. The size of a graphene bubble (eg, diameter and height) …
Three-dimensional (3-D) integration with through-silicon-vias (TSVs) has emerged as an effective approach to overcome the wiring limit beyond the 32nm technology node. Due to …
SK Ryu, KH Lu, T Jiang, JH Im… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Three-dimensional (3-D) integration with through-silicon vias (TSVs) has emerged as an effective solution to overcome the wiring limit imposed on device density and performance …
Nanoelectronics is changing the way the world communicates, and is transforming our daily lives. Continuing Moore's law and miniaturization of low-power semiconductor chips with …
Three-dimensional (3D) integration has emerged as a potential solution to the wiring limits imposed on chip performance, power dissipation, and packaging form factor beyond the 14 …
R Sugie, T Uchida - Journal of Applied Physics, 2017 - pubs.aip.org
The stress dependencies of the phonon modes in a 4H silicon carbide (SiC) crystal were investigated. The deformation potentials of the A 1 (TO), E 2, and E 1 (TO) modes were …
I De Wolf - Journal of Applied Physics, 2015 - pubs.aip.org
This paper provides a detailed description explaining how to calculate the relation between the silicon Raman frequency and local stress or strain in the silicon, applied to stress …
PA Thadesar, X Gu, R Alapati… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
To address the abating performance improvements from device scaling, innovative 2.5-D and 3-D integrated circuits with vertical interconnects called through-silicon vias (TSVs) …