A review of recent research on heat transfer in three-dimensional integrated circuits (3-D ICs)

SS Salvi, A Jain - IEEE Transactions on Components …, 2021 - ieeexplore.ieee.org
Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …

Stress/strain characterization in electronic packaging by micro-Raman spectroscopy: A review

L Ma, W Qiu, X Fan - Microelectronics Reliability, 2021 - Elsevier
In this review, a review a of the applications of micro-Raman spectroscopy (μRS) to
characterize the residual strain and/or stress in electronic packaging is presented. Micro …

Analytical methods for the mechanics of graphene bubbles

K Yue, W Gao, R Huang, KM Liechti - Journal of Applied Physics, 2012 - pubs.aip.org
When placing a graphene membrane on a substrate, gas molecules may be trapped
underneath to form bubbles. The size of a graphene bubble (eg, diameter and height) …

Measurement and analysis of thermal stresses in 3D integrated structures containing through-silicon-vias

T Jiang, SK Ryu, Q Zhao, J Im, R Huang… - Microelectronics …, 2013 - Elsevier
Three-dimensional (3-D) integration with through-silicon-vias (TSVs) has emerged as an
effective approach to overcome the wiring limit beyond the 32nm technology node. Due to …

Effect of thermal stresses on carrier mobility and keep-out zone around through-silicon vias for 3-D integration

SK Ryu, KH Lu, T Jiang, JH Im… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Three-dimensional (3-D) integration with through-silicon vias (TSVs) has emerged as an
effective solution to overcome the wiring limit imposed on device density and performance …

[图书][B] Metrology and Diagnostic Techniques for Nanoelectronics

Z Ma, DG Seiler - 2017 - taylorfrancis.com
Nanoelectronics is changing the way the world communicates, and is transforming our daily
lives. Continuing Moore's law and miniaturization of low-power semiconductor chips with …

Through-silicon via stress characteristics and reliability impact on 3D integrated circuits

T Jiang, J Im, R Huang, PS Ho - Mrs Bulletin, 2015 - cambridge.org
Three-dimensional (3D) integration has emerged as a potential solution to the wiring limits
imposed on chip performance, power dissipation, and packaging form factor beyond the 14 …

Determination of stress components in 4H-SiC power devices via Raman spectroscopy

R Sugie, T Uchida - Journal of Applied Physics, 2017 - pubs.aip.org
The stress dependencies of the phonon modes in a 4H silicon carbide (SiC) crystal were
investigated. The deformation potentials of the A 1 (TO), E 2, and E 1 (TO) modes were …

Relation between Raman frequency and triaxial stress in Si for surface and cross-sectional experiments in microelectronics components

I De Wolf - Journal of Applied Physics, 2015 - pubs.aip.org
This paper provides a detailed description explaining how to calculate the relation between
the silicon Raman frequency and local stress or strain in the silicon, applied to stress …

Through-silicon vias: drivers, performance, and innovations

PA Thadesar, X Gu, R Alapati… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
To address the abating performance improvements from device scaling, innovative 2.5-D
and 3-D integrated circuits with vertical interconnects called through-silicon vias (TSVs) …