This review investigates the measurement methods employed to assess the geometry and
electrical properties of through-silicon vias (TSVs) and examines the reliability issues …

To address the abating performance improvements from device scaling, innovative 2.5-D
and 3-D integrated circuits with vertical interconnects called through-silicon vias (TSVs) …

Modeling and Design of Electromagnetic Compatibility for High-Speed Printed Circuit
Boards and Packaging presents the electromagnetic modelling and design of three major …

Physical limit of transistor miniaturization has driven chip design into the third dimension. 3D
integration technology emerges as a viable option to improve chip performance and …

An equivalent-circuit model of shield differential through-silicon vias (SDTSVs) in 3-D
integrated circuits (3-D ICs) is proposed in this paper. The proposed model is verified using …

This article proposes a novel differential through-silicon via (D-TSV) structure, which is filled
with vertically aligned carbon nanotube (VACNT) array. Two metal pads are deposited on …

Vertically integrated circuits (3-D ICs) may revitalize Moore's law scaling which has slowed
down in recent years. 3-D stacking is an emerging technology that stacks multiple dies …

With the increasing demand for high-density integration, low power consumption and high
bandwidth, creating more sophisticated interconnection technologies is becoming …

Using high-speed through-silicon via (TSV) channels is a potential means of utilizing 3-D
interconnections to realize considerable high-bandwidth throughput in vertically stacked and …

Electromagnetic compatibility-oriented study is performed for accurately characterizing
through silicon single-walled carbon nanotube bundle via (TS-SWCNTBV) array in this …