Complexity of two-level logic minimization

C Umans, T Villa… - IEEE Transactions on …, 2006 - ieeexplore.ieee.org
The complexity of two-level logic minimization is a topic of interest to both computer-aided
design (CAD) specialists and computer science theoreticians. In the logic synthesis …

The Esterel synchronous programming language: Design, semantics, implementation

G Berry, G Gonthier - Science of computer programming, 1992 - Elsevier
We present the E sterel programming language which is especially designed to program
reactive systems, that is systems which maintain a permanent interaction with their …

[图书][B] Architecture and CAD for deep-submicron FPGAs

V Betz, J Rose, A Marquardt - 2012 - books.google.com
Since their introduction in 1984, Field-Programmable Gate Arrays (FPGAs) have become
one of the most popular implementation media for digital circuits and have grown into a $2 …

Majority-inverter graph: A new paradigm for logic optimization

L Amaru, PE Gaillardon… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
In this paper, we propose a paradigm shift in representing and optimizing logic by using only
majority (MAJ) and inversion (INV) functions as basic operations. We represent logic …

DAG-aware AIG rewriting a fresh look at combinational logic synthesis

A Mishchenko, S Chatterjee, R Brayton - Proceedings of the 43rd annual …, 2006 - dl.acm.org
This paper presents a technique for preprocessing combinational logic before technology
mapping. The technique is based on the representation of combinational logic using And …

The foundations of Esterel

G Berry - 2000 - direct.mit.edu
This paper informally presents the theoretical and practical foundations of synchronous
programming of reactive systems, mostly focusing on the author's Esterel language …

Power minimization in IC design: Principles and applications

M Pedram - ACM Transactions on Design Automation of Electronic …, 1996 - dl.acm.org
Low power has emerged as a principal theme in today's electronics industry. The need for
low power has caused a major paradigm shift in which power dissipation is as important as …

[图书][B] Electronic design automation: synthesis, verification, and test

LT Wang, YW Chang, KTT Cheng - 2009 - books.google.com
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI
practitioners and researchers in need of fluency in an" adjacent" field will find this an …

Principles in the evolutionary design of digital circuits—Part I

JF Miller, D Job, VK Vassilev - Genetic programming and evolvable …, 2000 - Springer
An evolutionary algorithm is used as an engine for discovering new designs of digital
circuits, particularly arithmetic functions. These designs are often radically different from …

Synthesis of high-performance analog circuits in ASTRX/OBLX

ES Ochotta, RA Rutenbar… - IEEE Transactions on …, 1996 - ieeexplore.ieee.org
We present a new synthesis strategy that can automate fully the path from an analog circuit
topology and performance specifications to a sized circuit schematic. This strategy relies on …