Digital phased arrays: Challenges and opportunities

C Fulton, M Yeary, D Thompson, J Lake… - Proceedings of the …, 2016 - ieeexplore.ieee.org
Digital beamforming (DBF) has long been heralded as the next frontier in phased array
technology, and not without reason. The digitization of transmit and receive signals at the …

Energy-efficient networks-on-chip architectures: Design and run-time optimization

SK Mandal, A Krishnakumar, UY Ogras - Network-on-Chip Security and …, 2021 - Springer
Abstract Networks-on-Chip (NoC) architectures have become the mainstream
communication backbone of high-end processors and systems-on-chip (SoCs) after their …

Impact of on-chip interconnect on in-memory acceleration of deep neural networks

G Krishnan, SK Mandal, C Chakrabarti, JS Seo… - ACM Journal on …, 2021 - dl.acm.org
With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms
have evolved in two diverse directions—one with ever-increasing connection density for …

Simulating and evaluating interconnection networks with INSEE

J Navaridas, J Miguel-Alonso, JA Pascual… - … Modelling Practice and …, 2011 - Elsevier
This paper describes INSEE, a simulation framework developed at the University of the
Basque Country. INSEE is designed to carry out performance-related studies of …

Application-specific topology generation algorithms for network-on-chip design

S Tosun, Y Ar, S Ozdemir - IET computers & digital techniques, 2012 - IET
Network-on-chip (NoC) is an alternative approach to traditional communication methods for
system-on-chip architectures. Irregular topologies are preferable for the application specific …

FoToNoC: A folded torus-like network-on-chip based many-core systems-on-chip in the dark silicon era

L Yang, W Liu, W Jiang, M Li, P Chen… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Dark silicon refers to the phenomenon that a fraction of a many-core chip has to become
“dark” or “dim” in order to guarantee the system to be kept in a safe temperature range and …

VirtPhy: Fully programmable NFV orchestration architecture for edge data centers

CK Dominicini, GL Vassoler… - … on Network and …, 2017 - ieeexplore.ieee.org
Emerging paradigms, such as edge computing, require the geographical distribution of
small-scale data centers that will use network functions virtualization (NFV) to provide new …

Robustness analysis of mesh-based network-on-chip architecture under flooding-based denial of service attacks

D Fang, H Li, J Han, X Zeng - 2013 IEEE Eighth International …, 2013 - ieeexplore.ieee.org
The attacks such as Denial of Service (DoS) violate the security of Network-on-Chip (NoC)
which emerges as a promising solution for multi-core system. In this paper, we explore the …

Hardware Trojan Mitigation Technique in Network-on-Chip (NoC)

M Hussain, NK Baloach, G Ali, M ElAffendi, IB Dhaou… - Micromachines, 2023 - mdpi.com
Due to globalization in the semiconductor industry, malevolent modifications made in the
hardware circuitry, known as hardware Trojans (HTs), have rendered the security of the chip …

Defragmentation for efficient runtime resource management in NoC-based many-core systems

J Ng, X Wang, AK Singh, T Mak - IEEE Transactions on Very …, 2016 - ieeexplore.ieee.org
Efficient runtime resource allocation is critical to the overall performance and energy
consumption of many-core systems. A region of free cores is allocated for each newly …