Reliable systems on unreliable fabrics

T Austin, V Bertacco, S Mahlke… - IEEE Design & Test of …, 2008 - ieeexplore.ieee.org
The continued scaling of silicon fabrication technology has led to significant reliability
concerns, which are quickly becoming a dominant design challenge. Design integrity is …

Parameter variation tolerance and error resiliency: New design paradigm for the nanoscale era

S Ghosh, K Roy - Proceedings of the IEEE, 2010 - ieeexplore.ieee.org
Variations in process parameters affect the operation of integrated circuits (ICs) and pose a
significant threat to the continued scaling of transistor dimensions. Such parameter …

Leakage power and circuit aging cooptimization by gate replacement techniques

Y Wang, X Chen, W Wang, Y Cao… - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
As technology scales, the aging effect caused by negative bias temperature instability (NBTI)
has become a major reliability concern. In the mean time, reducing leakage power remains …

On the efficacy of input vector control to mitigate NBTI effects and leakage power

Y Wang, X Chen, W Wang… - … on Quality Electronic …, 2009 - ieeexplore.ieee.org
As technology scales, the aging effect caused by Negative Bias Temperature Instability
(NBTI) has become a major reliability concerns for circuit designers. Consequently, we have …

Thermal-aware reliability analysis for platform FPGAs

P Mangalagiri, S Bae, R Krishnan, Y Xie… - 2008 IEEE/ACM …, 2008 - ieeexplore.ieee.org
Increasing levels of integration in Field Programmable Gate Arrays, have resulted in high on-
chip power densities, and temperatures. The heterogeneity of components and scaled …

Comparative analysis of NBTI effects on low power and high performance flip-flops

K Ramakrishnan, X Wu… - … on Computer Design, 2008 - ieeexplore.ieee.org
Mitigating the circuit aging effect in digital circuits has become a very important concern for
current and future technology nodes. Negative Bias Temperature Instability (NBTI) is one of …

Node criticality computation for circuit timing analysis and optimization under NBTI effect

W Wang, S Yang, Y Cao - 9th International Symposium on …, 2008 - ieeexplore.ieee.org
For sub-65 nm technology nodes, Negative Bias Temperature Instability (NBTI) has become
a primary limiting factor of circuit lifetime. During the past few years, researchers have spent …

BTI-Gater: An aging-resilient clock gating methodology

L Lai, V Chandra, R Aitken… - IEEE Journal on Emerging …, 2014 - ieeexplore.ieee.org
Negative-and positive bias temperature instability (N/PBTI) have become one of the most
important reliability issues in modern semiconductor technology. N/PBTI-induced …

MOSFET Modeling for 45nm and Beyond

Y Cao, C McAndrew - 2007 IEEE/ACM International …, 2007 - ieeexplore.ieee.org
Compact MOSFET models are a critical link between technology and design. The inexorable
reduction in supply voltage and geometry to 45nm and below adds or emphasizes physical …

A framework for estimating NBTI degradation of microarchitectural components

M DeBole, K Ramakrishnan… - 2009 Asia and South …, 2009 - ieeexplore.ieee.org
Degradation of device parameters over the lifetime of a system is emerging as a significant
threat to system reliability. Among the aging mechanisms, wearout resulting from NBTI is of …