Survey of scheduling techniques for addressing shared resources in multicore processors
S Zhuravlev, JC Saez, S Blagodurov… - ACM Computing …, 2012 - dl.acm.org
Chip multicore processors (CMPs) have emerged as the dominant architecture choice for
modern computing platforms and will most likely continue to be dominant well into the …
modern computing platforms and will most likely continue to be dominant well into the …
A survey on cache management mechanisms for real-time embedded systems
Multicore processors are being extensively used by real-time systems, mainly because of
their demand for increased computing power. However, multicore processors have shared …
their demand for increased computing power. However, multicore processors have shared …
A closer look at spatiotemporal convolutions for action recognition
In this paper we discuss several forms of spatiotemporal convolutions for video analysis and
study their effects on action recognition. Our motivation stems from the observation that 2D …
study their effects on action recognition. Our motivation stems from the observation that 2D …
Heracles: Improving resource efficiency at scale
User-facing, latency-sensitive services, such as websearch, underutilize their computing
resources during daily periods of low traffic. Reusing those resources for other tasks is rarely …
resources during daily periods of low traffic. Reusing those resources for other tasks is rarely …
Bubble-up: Increasing utilization in modern warehouse scale computers via sensible co-locations
As much of the world's computing continues to move into the cloud, the overprovisioning of
computing resources to ensure the performance isolation of latency-sensitive tasks, such as …
computing resources to ensure the performance isolation of latency-sensitive tasks, such as …
Towards energy proportionality for large-scale latency-critical workloads
Reducing the energy footprint of warehouse-scale computer (WSC) systems is key to their
affordability, yet difficult to achieve in practice. The lack of energy proportionality of typical …
affordability, yet difficult to achieve in practice. The lack of energy proportionality of typical …
Parallelism-aware batch scheduling: Enhancing both performance and fairness of shared DRAM systems
O Mutlu, T Moscibroda - ACM SIGARCH Computer Architecture News, 2008 - dl.acm.org
In a chip-multiprocessor (CMP) system, the DRAM system isshared among cores. In a
shared DRAM system, requests from athread can not only delay requests from other threads …
shared DRAM system, requests from athread can not only delay requests from other threads …
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems
E Ebrahimi, CJ Lee, O Mutlu, YN Patt - ACM Sigplan Notices, 2010 - dl.acm.org
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the
memory subsystem. If resource sharing is unfair, some applications can be delayed …
memory subsystem. If resource sharing is unfair, some applications can be delayed …
The application slowdown model: Quantifying and controlling the impact of inter-application interference at shared caches and main memory
In a multi-core system, interference at shared resources (such as caches and main memory)
slows down applications running on different cores. Accurately estimating the slowdown of …
slows down applications running on different cores. Accurately estimating the slowdown of …
Towards practical page coloring-based multicore cache management
Modern multi-core processors present new resource management challenges due to the
subtle interactions of simultaneously executing processes sharing on-chip resources …
subtle interactions of simultaneously executing processes sharing on-chip resources …