On reliability management of energy-aware real-time systems through task replication

MA Haque, H Aydin, D Zhu - IEEE Transactions on Parallel and …, 2016 - ieeexplore.ieee.org
On emerging multicore systems, task replication is a powerful way to achieve high reliability
targets. In this paper, we consider the problem of achieving a given reliability target for a set …

Multi-layer dependability: From microarchitecture to application level

J Henkel, L Bauer, H Zhang, S Rehman… - Proceedings of the 51st …, 2014 - dl.acm.org
We show in this paper that multi-layer dependability is an indispensable way to cope with
the increasing amount of technology-induced dependability problems that threaten to …

Classification of resilience techniques against functional errors at higher abstraction layers of digital systems

G Psychou, D Rodopoulos, MM Sabry… - ACM Computing …, 2017 - dl.acm.org
Nanoscale technology nodes bring reliability concerns back to the center stage of digital
system design. A systematic classification of approaches that increase system resilience in …

Power/energy minimization techniques for variability-aware high-performance 16-nm 6T-SRAM

J Samandari-Rad, R Hughey - IEEE Access, 2016 - ieeexplore.ieee.org
Power and energy minimization is a critical concern for the battery life, reliability, and yield of
many minimum-sized SRAMs. In this paper, we extend our previously proposed hybrid …

Low-cost memory fault tolerance for IoT devices

M Gottscho, I Alam, C Schoeny, L Dolecek… - ACM Transactions on …, 2017 - dl.acm.org
IoT devices need reliable hardware at low cost. It is challenging to efficiently cope with both
hard and soft faults in embedded scratchpad memories. To address this problem, we …

Workload-and instruction-aware timing analysis: The missing link between technology and system-level resilience

VB Kleeberger, PR Maier, U Schlichtmann - Proceedings of the 51st …, 2014 - dl.acm.org
In today's design of resilient embedded systems, logic circuit components play a key role.
Many possible design choices at the gate level, such as implementation architecture or …

Self-aware memory management for emerging energy-efficient architectures

B Maity, B Donyanavard, N Dutt - 2020 11th International Green …, 2020 - ieeexplore.ieee.org
With the advent of GPUs and application-specific accelerators in embedded platforms, data-
intensive applications have exacerbated the memory performance and energy bottleneck …

DPCS: Dynamic power/capacity scaling for SRAM caches in the nanoscale era

M Gottscho, A BanaiyanMofrad, N Dutt… - ACM Transactions on …, 2015 - dl.acm.org
Fault-Tolerant Voltage-Scalable (FTVS) SRAM cache architectures are a promising
approach to improve energy efficiency of memories in the presence of nanoscale process …

NSF expedition on variability-aware software: Recent results and contributions

L Wanner, L Lai, A Rahimi, M Gottscho… - it-Information …, 2015 - degruyter.com
In this paper we summarize recent results and contributions from the NSF Expedition on
Variability-Aware Software, a five year, multi-university effort to tackle the problem of …

Quality-configurable memory hierarchy through approximation: Special session

M Shoushtari, AM Rahmani, N Dutt - Proceedings of the 2017 …, 2017 - dl.acm.org
The memory subsystem is a major contributor to the overall performance and energy
consumption of embedded computing platforms. The emergence of" killer" applications such …