A Review On N-Bit Ripple-Carry Adder, Carry-Select Adder And Carry-Skip Adder

V Vijay, M Sreevani, EM Rekha, K Moses… - Journal of VLSI …, 2022 - vlsijournal.com
The primary component in most digital circuit representation, including the microprocessor
data path element and the digital signal processor, is the binary adder. Binary Adders, which …

Physically unclonable functions using two-level finite state machine

V Vijay, K Chaitanya, CS Pittala… - Journal of VLSI …, 2022 - vlsijournal.com
The usage of physically unclonable functions is for authentications, identification
applications, signature generation, IC metering, and cryptographic key generation …

Design of unbalanced ternary logic gates and arithmetic circuits

V Vijay, CS Pittala, KC Koteshwaramma… - Journal of VLSI …, 2022 - vlsijournal.com
The design of ternary Logic gates–Ternary NAND, Ternary NOR and Standard Ternary
Inverter based on the 18nm FinFET technology is proposed. The Ternary logic systems …

Biasing Techniques: Validation of 3 to 8 Decoder Modules Using 18nm FinFET Nodes

CS Pittala, M Lavanya, M Saritha… - 2021 2nd …, 2021 - ieeexplore.ieee.org
In this research paper, we planned a low leakage power and high speed decoder for
memory cluster application and proposed modern four strategies. In this paper, the collation …

Energy Efficient Decoder Circuit Using Source Biasing Technique in CNTFET Technology

CS Pittala, M Lavanya, V Vijay, Y Reddy… - 2021 Devices for …, 2021 - ieeexplore.ieee.org
VLSI technology is essential for chip fabrication, and 3 to 8 decoder circuits are used in
electronic gadgets; consistency of design, small, fast, in this proposed circuit, 3 to 8 decoder …

Fake currency recognition system using edge detection

PA Babu, P Sridhar… - … Research in Technology …, 2022 - ieeexplore.ieee.org
In this paper, we propose a system for currency recognition system and the detection of fake
Indian currency banknotes using image processing techniques. It is hard for people to …

Universal shift register designed at low supply voltages in 15 nm CNTFET using multiplexer

RR Vallabhuni, M Saritha, S Chikkapally… - International Conference …, 2021 - Springer
Shift registers are important memory element in sequential circuits and also utilized as a
memory element in computers, including RAM and numerous types of registers. Besides …

8-Bit Carry Look Ahead Adder Using MGDI Technique

PA Babu, VS Nagaraju, RR Vallabhuni - IoT and Analytics for Sensor …, 2022 - Springer
High-performance and low power consumption are major factors that describe the
significance of a design in VLSI. At low and ultra-low power applications, power …

Realısatıon of Performance Optımısed 32-Bıt Vedıc Multıplıer

J Sravana, KS Indrani, M Saranya, PS Kiran… - Journal of VLSI …, 2022 - vlsijournal.com
This paper demonstrates the improved adaptation of the Vedic Multiplier using the Vedic
standards, which includes old sutras. In this paper, current and proposed model are …

Implementation of Spurious Power Suppression based Radix-4 Booth Multiplier using Parallel Prefix Adders

J Sravana, SKH Bindhu, K Sharvani… - … on Recent Trends in …, 2022 - ieeexplore.ieee.org
In VLSI, for performing multiplication, we use a* b. We use the booth multiplication
mechanism rather than the standard conventional method to improve the speed since it …