A review of near-memory computing architectures: Opportunities and challenges
The conventional approach of moving stored data to the CPU for computation has become a
major performance bottleneck for emerging scale-out data-intensive applications due to their …
major performance bottleneck for emerging scale-out data-intensive applications due to their …
System, method, and computer program product for improving memory systems
MS Smith - US Patent 9,432,298, 2016 - Google Patents
H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof the devices being of types …
state devices; Multistep manufacturing processes thereof the devices being of types …
Monolithic 3D Integrated circuits: Recent trends and future prospects
Monolithic 3D integration technology has emerged as an alternative candidate to
conventional transistor scaling. Unlike conventional processes where multiple metal layers …
conventional transistor scaling. Unlike conventional processes where multiple metal layers …
NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules
A Farmahini-Farahani, JH Ahn… - 2015 IEEE 21st …, 2015 - ieeexplore.ieee.org
Energy consumed for transferring data across the processor memory hierarchy constitutes a
large fraction of total system energy consumption, and this fraction has steadily increased …
large fraction of total system energy consumption, and this fraction has steadily increased …
GenStore: A high-performance in-storage processing system for genome sequence analysis
Read mapping is a fundamental step in many genomics applications. It is used to identify
potential matches and differences between fragments (called reads) of a sequenced …
potential matches and differences between fragments (called reads) of a sequenced …
Kiln: Closing the performance gap between systems with and without persistence support
Persistent memory is an emerging technology which allows in-memory persistent data
objects to be updated at much higher throughput than when using disks as persistent …
objects to be updated at much higher throughput than when using disks as persistent …
Near-memory computing: Past, present, and future
The conventional approach of moving data to the CPU for computation has become a
significant performance bottleneck for emerging scale-out data-intensive applications due to …
significant performance bottleneck for emerging scale-out data-intensive applications due to …
NERO: A near high-bandwidth memory stencil accelerator for weather prediction modeling
G Singh, D Diamantopoulos… - … Conference on Field …, 2020 - ieeexplore.ieee.org
Ongoing climate change calls for fast and accurate weather and climate modeling. However,
when solving large-scale weather prediction simulations, state-of-the-art CPU and GPU …
when solving large-scale weather prediction simulations, state-of-the-art CPU and GPU …
25.2 A 1.2 V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV
Increasing demand for higher-bandwidth DRAM drive TSV technology development. With
the capacity of fine-pitch wide I/O [1], DRAM can be directly integrated on the interposer or …
the capacity of fine-pitch wide I/O [1], DRAM can be directly integrated on the interposer or …
Efficiently enabling conventional block sizes for very large die-stacked DRAM caches
Die-stacking technology enables multiple layers of DRAM to be integrated with multicore
processors. A promising use of stacked DRAM is as a cache, since its capacity is insufficient …
processors. A promising use of stacked DRAM is as a cache, since its capacity is insufficient …