[PDF][PDF] Blind oversampling data recovery with low hardware complexity

M Kubíček, Z Kolka - Radioengineering, 2010 - core.ac.uk
The paper is focused on the optimization and implementation of fully digital feed-forward
blind oversampling CDR (BO-CDR). Two new phase-decision algorithms are proposed …

一种改进型盲过采样时钟数据恢复电路

高宁, 桂江华, 吴江 - 电子与封装, 2017 - ep.org.cn
设计一种改进型盲过采样时钟数据恢复电路. 电路主要由并行过采样, 滤波整形,
鉴相编码和数据选择等模块组成. 提出的滤波整形电路可以有效改善采样数据流 …

Implementation of an All-Digital DRC for 100BASE-FX

G Luo, Q Wang, Y Liu, Y Zhang, H Sun… - … Conference on Testbeds …, 2022 - Springer
This paper proposes a blind oversampling data recovery algorithm LUT-DRC (Data
Recovery Algorithm Based on Look-Up Table) for 100Base-FX. The LUT-DRC can recover …

A small fully digital open‐loop clock and data recovery circuit for wired BANs

F Derogarian, JC Ferreira… - International Journal of …, 2016 - Wiley Online Library
This paper proposes a new open‐loop and low complexity (small size) fast‐lock
synchronization circuit for clock and data recovery in wearable systems. The system …

All digital wireless transceiver using modified BPSK and 2/3 sub-sampling technique

S Bushnaq, T Nakura, M Ikeda… - 2009 IEEE 8th …, 2009 - ieeexplore.ieee.org
In this paper an all digital wireless transceiver is presented, with a proposed technique for
data recovery. Communication is carried out on carrier frequency of 100 MHz with a local …

Analysis of CDR with simplified selection of sampling domain

Z Kolka, M Kubicek, V Biolkova, I Hlavickova - IEEE Africon'11, 2011 - ieeexplore.ieee.org
The paper deals with a statistical simulation model for a newly proposed feed-forward blind
oversampling Clock and Data Recovery circuit with low hardware complexity. Unlike …

A Improved Blind Oversampling Clock and Data Recovery Circuit

GAO Ning, GUI Jianghua, WU Jiang - Electronics and Packaging, 2017 - ep.org.cn
This is a improved blind oversampling clock and data recovery circuit. The circuit mainly
contains parallel oversampling module, filtering and shaping circuit, phase detector and …

[PDF][PDF] MODELOVÁNÍ A IMPLEMENTACE SUBSYSTÉMŮ KOMUNIKAČNÍHO ŘETĚZCE V OBVODECH FPGA

PIM Kubíček, Z Kolka - core.ac.uk
Most modern clock and data recovery circuits (CDR) are based on analog blocks that need
to be redesigned whenever the technology process is to be changed. On the other hand …

Design of a body sensor network embedded in textiles for biomedical applications

FD Miyandoab - 2015 - search.proquest.com
Abstract Body Sensor Networks (BSNs) or Body Area Networks (BANs) refer to a
subcategory of sensor networks mainly used for measuring or monitoring vital body …