This chapter is to provide a tutorial and pointers to results and related work on timed
automata with a focus on semantical and algorithmic aspects of verification tools. We …

Petrify is a tool for (1) manipulating concurrent specifications and (2) synthesis and
optimization of asynchronous control circuits. Given a Petri Net (PN), a Signal Transition …

This paper presents a novel method to derive a Petri net from any specification model that
can be mapped into a state-based representation with arcs labeled with symbols from an …

Timed automata are a popular formalism to model real-time systems. They were introduced
two decades ago to support formal verification. Since then they have also been used for …

Petri nets are a powerful language for describing processes in digital hardware, and
particularly asynchronous or self-timed circuits. Self-timed circuits are designed to operate …

In this paper, an algebra of timed processes with real-valued clocks is presented, which
serves as a formal description language for real-time communicating systems. We show that …

In this paper we present an algorithm for efficiently computing optimal cost of reaching a
goal state in the model of Linearly Priced Timed Automata (LPTA). The central contribution …

This paper describes a newdata structure, difference decision diagrams (DDDs), for
representing a Boolean logic over inequalities of the form xy≤ c where the variables are …

In this paper we present an algorithm for efficiently computing the minimum cost of reaching
a goal state in the model of Uniformly Priced Timed Automata (UPTA). This model can be …

The purpose of this monograph is to provide both an introduction to eld of asynchronous
digital circuit design and an overview of the practical state of the art in 1997. In the early …