Now a days, an efficient arithmetic operations are important to accomplish the high
performance. In every one of these applications, multiplier is an important arithmetic …

Vedic algorithm is beneficial for the application in the design of high‐speed computing and
hardware. This study presents a fast signed binary multiplication structure based on Vedic …

In today's smart and fast computing world, the designing of high speed and low energy
consumption based Digital Signal Processors (DSPs) is a realistic and ever embryonic area …

This study presents a high‐speed signed Vedic multiplier (SVM) architecture using
redundant binary (RB) representation in Urdhva Tiryagbhyam (UT) sutra. This is the first ever …

This study presents a generalised architecture for cube operation based on Yavadunam
sutra of Vedic mathematics. This algorithm converts the cube of a large magnitude number …

The ancient Vedic mathematics is well known for quicker handy multiplications but its
recognition as an integrated circuit core against existing hardware multipliers is not …

In comparison to complementary metal oxide semiconductor (CMOS), quantum-dot cellular
automata (QCA) is an efficient nano-scale method for constructing circuits. Innovative digital …

Quantum cell automata (QCA) are the best possible alternative to the conventional CMOS
technology due to its low power consumption, less area and high-speed operation. This …

In a Very Large Scale Integration (VLSI) Field, multipliers play a vital role. In practice,
multipliers are utilizing as unsigned and signed category. An unsigned multiplier does the …

With the ever-escalating demand for high-speed and low-power technology, the archetype
of Ancient Vedic Mathematics provides a new approach to modern computing systems …