[图书][B] Dynamic analysis of Petri net-based discrete systems

A Karatkevich - 2007 - books.google.com
Design of modern digital hardware systems and of complex software systems is almost
always connected with parallelism. For example, execution of an object-oriented p-gram can …

Theoretical aspects of Petri nets decomposition based on invariants and hypergraphs

R Wiśniewski, Ł Stefanowicz, A Bukowiec… - Multimedia and …, 2014 - Springer
Two methods of Petri nets decomposition into State Machine Components (SMCs) are
shown in the paper. The first one bases on the well-known algorithm of place invariants (p …

Application of comparability graphs in decomposition of Petri nets

R Wiśniewski, A Karatkevich… - 2014 7th International …, 2014 - ieeexplore.ieee.org
In the article we present a new algorithm of Petri net decomposition into State Machine
Components (SMCs). The idea bases on the application of the comparability graph theory …

UML state machine implementation in FPGA devices by means of dual model and Verilog

M Doligalski, M Adamski - 2013 11th IEEE international …, 2013 - ieeexplore.ieee.org
The paper presents the methodology of the logic controller development process based on
the UML state machine diagram. The development process covers the logic synthesis and …

Statechart-based controllers synthesis in FPGA structures with embedded array blocks

G Łabiak, G Borowik - International Journal of Electronics and …, 2010 - journals.pan.pl
Statechart diagrams, in general, are visual formal-ism for description of complex systems
behaiour. Digital controllers, which act as reactive systems, can be very conveniently …

Petri nets mapping into reconfigurable logic controllers

M Adamski, M Węgrzyn - Electronics and Telecommunications Quarterly, 2009 - infona.pl
The paper concentrates on the behavioral specification of Reconfigurable Logic Controller
programs, given initially as Petri nets and later rewritten in Hardware Description …

[PDF][PDF] Implementation of algorithm of Petri nets distributed synthesis into FPGA

A Bukowiec, J Tkacz, T Gratkowski… - International Journal of …, 2013 - bibliotekanauki.pl
In the paper an implementation of algorithm of Petri net array-based synthesis is presented.
The method is based on decomposition of colored interpreted macro Petri net into subnets …

[PDF][PDF] Synthesis of macro Petri nets into FPGA with distributed memories

A Bukowiec, M Adamski - International Journal of Electronics and …, 2012 - bibliotekanauki.pl
In this paper a new method of Petri net array-based synthesis is proposed. The method is
based on decomposition of colored interpreted macro Petri net into state machine subnets …

FSM-based logic controller synthesis in programmable devices with embedded memory blocks

G Borowik, G Łabiak, A Bukowiec - Innovative Technologies in …, 2015 - Springer
For a typical digital system, the design process consists of compilation, translation,
synthesis, logic optimization, and technology mapping. Although the final result of that …

Behavioral specification diversification for logic controllers implemented in FPGA devices

M Doligalski - Proceedings of the Annual FPGA Conference, 2012 - dl.acm.org
This paper deals with a new approach to logic controllers developing process. Classic
development approach assumes the use of only one chosen model for the purpose of a …